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<title>lume/na/drivers, branch master</title>
<subtitle>A general-purpose operating system with Linux ABI compatibility
</subtitle>
<id>https://git.richardqin.org/lume/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/lume/atom?h=master'/>
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<updated>2026-07-10T03:31:46Z</updated>
<entry>
<title>refactor: promote new architecture to repository root</title>
<updated>2026-07-10T03:31:46Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-07-10T03:31:46Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/lume/commit/?id=e90b72ec3082588b296956730bd2930cf8d5d671'/>
<id>urn:sha1:e90b72ec3082588b296956730bd2930cf8d5d671</id>
<content type='text'>
Archive the deprecated implementation under lume-legacy, make the new kernel the default root-level build, and update repository entry points without changing kernel behavior.
</content>
</entry>
<entry>
<title>feat: establish bootable new architecture checkpoint</title>
<updated>2026-07-10T03:24:56Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-07-10T03:24:56Z</published>
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<id>urn:sha1:1767d390fbf3d0c65389de46caf0b6d43ef3b6ad</id>
<content type='text'>
Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.
</content>
</entry>
<entry>
<title>feat: update module.mk files to include additional source files for various subsystems</title>
<updated>2026-05-13T08:32:52Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-13T08:32:52Z</published>
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<id>urn:sha1:63dc025705f6533b91fb1a7d26e6ed864efd9900</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: implement RISC-V Platform-Level Interrupt Controller with dynamic context mapping and MMIO operations</title>
<updated>2026-05-13T08:06:43Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-13T08:06:43Z</published>
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<id>urn:sha1:5a0c0c4857dc6614a764507e4454d88b4da27534</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: enhance UART driver and FDT parser with MMU support and default UART settings</title>
<updated>2026-05-13T07:50:37Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-13T07:50:37Z</published>
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<id>urn:sha1:7f92ecc3b1dd01dd12c72ba17bc8bf1652495d2c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: implement KASLR support and runtime address mapping for RISC-V architecture</title>
<updated>2026-05-02T17:47:15Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-02T17:47:15Z</published>
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<id>urn:sha1:2b237b24c4db5513f8046e15d24501257e7feeaa</id>
<content type='text'>
Co-authored-by: Copilot &lt;copilot@github.com&gt;
</content>
</entry>
<entry>
<title>fix: correct UART address conversion in early_putc function</title>
<updated>2026-05-02T15:37:07Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-02T15:37:07Z</published>
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<id>urn:sha1:1522abc4bfb199e8bae80e4cee72f83a8704353d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: add driver registration subsystem with probe functionality</title>
<updated>2026-05-02T15:36:26Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-02T15:36:26Z</published>
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<id>urn:sha1:943bed289d145c1ff09bdd888f8060f2cfb433e8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: update UART handling and memory management parameters for improved functionality</title>
<updated>2026-05-01T17:48:10Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-05-01T17:48:10Z</published>
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<id>urn:sha1:ae72f8dcb029eed0f054b4c8b845868229b07038</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: add initial implementation of PLIC and UART drivers</title>
<updated>2026-04-21T15:20:56Z</updated>
<author>
<name>Richard Qin</name>
<email>richard.qin.x@gmail.com</email>
</author>
<published>2026-04-21T15:20:56Z</published>
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<id>urn:sha1:92ac3931ec7c2ee7746d38499edd9179c943c5ac</id>
<content type='text'>
</content>
</entry>
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