lume - A general-purpose operating system with Linux ABI compatibility

	Commit message (Collapse)	Author	Age	Files	Lines
*	dev(device): implement VirtIO	Richard Qin	2026-01-01	12	-0/+0
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*	dev: PILC implementation	Richard Qin	2025-12-31	2	-0/+0
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*	dev:Refactor Memory Management and Process Management	Richard Qin	2025-12-31	19	-0/+0
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*	fixed(vm): page allocation error	Richard Qin	2025-12-28	1	-0/+0
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*	fixed(proc):Fix the page table mapping error during process fork	Richard Qin	2025-12-28	2	-0/+0
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*	feat(syscall): implement functional sys_write using copyin for user console ↵	Richard Qin	2025-12-28	1	-0/+0
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*	feat(user): add user-space build system and init process to test fork/wait	Richard Qin	2025-12-28	2	-0/+0
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*	feat(syscall): Implement syscall dispatch and process lifecycle ↵	Richard Qin	2025-12-28	8	-0/+0
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*	feat: Implement the first user program of the lume OS	Richard Qin	2025-12-27	6	-0/+0
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*	Add the README to provide a detailed explanation of the project	Richard Qin	2025-12-14	1	-0/+0
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*	feat: add preemptive scheduling, SBI timer support and FDT parser.	Richard Qin	2025-12-13	9	-0/+0
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*	feat:Cooperative Multitasking	Richard Qin	2025-12-11	6	-0/+0
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*	feat: Add initial Supervisor Mode Trap Handler	Richard Qin	2025-12-10	4	-0/+0
\| \| \| \| \| \| \| \| \| \|	Implement the initial mechanism for handling traps and exceptions in Supervisor Mode. Set up the stvec Control and Status Register (CSR) to direct all S-Mode Traps (Interrupts and Exceptions) to a unified assembly entry point. Implemented assembly code for saving and restoring the Trap Context (register state). Provides the foundational framework necessary for future Timer Interrupts and System Calls.
*	feat: Initial PMM implementation	Richard Qin	2025-12-09	8	-4/+0
\| \| \| \| \| \|	Introduce the foundational Physical Memory Manager (PMM) and restructure the project for modularity. Implemented basic PMM and related memory management headers (mm/pmm.h, mm/vm.h). Updated Makefile and build process to support new modular structure.
*	The start of the project -- A MicroDOS	Richard Qin	2025-12-08	6	-0/+4
	feat: Initial bare-metal RISC-V boot with UART