| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | feat: Add initial Supervisor Mode Trap Handler | Richard Qin | 2025-12-10 | 1 | -1/+3 |
| | | | | | | | | | | | Implement the initial mechanism for handling traps and exceptions in Supervisor Mode. Set up the stvec Control and Status Register (CSR) to direct all S-Mode Traps (Interrupts and Exceptions) to a unified assembly entry point. Implemented assembly code for saving and restoring the Trap Context (register state). Provides the foundational framework necessary for future Timer Interrupts and System Calls. | ||||
| * | The start of the project -- A MicroDOS | Richard Qin | 2025-12-08 | 1 | -0/+14 |
| feat: Initial bare-metal RISC-V boot with UART | |||||
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| A general-purpose operating system with Linux ABI compatibility |
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