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* feat(types): defined a type aliasRichard Qin2025-12-301-15/+20
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* feat: Implement the first user program of the lume OSRichard Qin2025-12-271-1/+5
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* feat: add preemptive scheduling, SBI timer support and FDT parser.Richard Qin2025-12-131-1/+3
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* feat: Add initial Supervisor Mode Trap HandlerRichard Qin2025-12-101-1/+3
| | | | | | | | | | Implement the initial mechanism for handling traps and exceptions in Supervisor Mode. Set up the stvec Control and Status Register (CSR) to direct all S-Mode Traps (Interrupts and Exceptions) to a unified assembly entry point. Implemented assembly code for saving and restoring the Trap Context (register state). Provides the foundational framework necessary for future Timer Interrupts and System Calls.
* The start of the project -- A MicroDOSRichard Qin2025-12-081-0/+14
feat: Initial bare-metal RISC-V boot with UART