lume - A general-purpose operating system with Linux ABI compatibility

	Commit message (Collapse)	Author	Age	Files	Lines
*	feat: add RISC-V specific trap handling logic and dispatch functions	Richard Qin	2026-05-13	1	-0/+205
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*	feat: add support for Copy-On-Write in SV39 page table management	Richard Qin	2026-05-13	2	-6/+89
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*	feat: add LZ4 decompressor implementation and update linker script	Richard Qin	2026-05-13	1	-0/+7
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*	feat: add compressed kernel header and implementation for RISC-V architecture	Richard Qin	2026-05-13	1	-0/+471
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*	feat: add relocation header and implementation for RISC-V architecture	Richard Qin	2026-05-13	1	-1/+46
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*	feat: add relocation header and implementation for RISC-V architecture	Richard Qin	2026-05-13	1	-0/+100
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*	feat: refactor KASLR computation and enhance validation checks	Richard Qin	2026-05-13	1	-62/+145
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*	feat: add LumeOS compressed kernel header and update boot entry logic	Richard Qin	2026-05-13	1	-7/+38
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*	feat: enhance KASLR support with early seed metadata and validation checks	Richard Qin	2026-05-03	1	-5/+129
\| \| \| \|	Co-authored-by: Copilot <copilot@github.com>
*	feat: implement KASLR support and runtime address mapping for RISC-V ↵	Richard Qin	2026-05-03	3	-7/+104
\| \| \| \| \| \|	architecture Co-authored-by: Copilot <copilot@github.com>
*	feat: add Kconfig infrastructure for kernel configuration management	Richard Qin	2026-05-03	1	-0/+39
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*	feat: implement hardware random number generation and early PRNG initialization	Richard Qin	2026-05-02	2	-0/+48
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*	feat: add RISC-V configuration and memory management enhancements	Richard Qin	2026-05-02	6	-15/+112
\| \| \| \|	Co-authored-by: Copilot <copilot@github.com>
*	feat: update UART handling and memory management parameters for improved ↵	Richard Qin	2026-05-02	1	-4/+0
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*	feat: replace panic.h with klog.h for improved logging in multiple files	Richard Qin	2026-05-02	1	-1/+1
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*	feat: add SBI interface with ecall and timer functions for RISC-V architecture	Richard Qin	2026-05-02	1	-0/+39
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*	feat: add timer interrupt enable/disable functions for RISC-V architecture	Richard Qin	2026-05-02	1	-0/+15
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*	feat: add linker script and common macros for RISC-V architecture	Richard Qin	2026-04-22	1	-0/+81
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*	feat: implement SV39 page table interface and operations for RISC-V architecture	Richard Qin	2026-04-21	2	-0/+222
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*	feat: add RISC-V architecture configuration header with memory layout constants	Richard Qin	2026-04-21	2	-6/+41
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*	feat: Update Makefile and module.mk files to include additional source files ↵	Richard Qin	2026-04-21	1	-0/+1
\| \| \| \|	and improve build process
*	feat: add initial RISC-V architecture support and core kernel functionality	Richard Qin	2026-04-17	9	-0/+823
	- Implement MMU hardware primitives for RISC-V SV39 in mmu.h - Create trap vector control primitives in trap.h - Define trap frame structure for RISC-V in trapframe.h - Add assembly routines for context switching in swtch.S - Implement trap vector entry/exit in trap_vector.S - Introduce basic error number definitions in errno.h - Provide placement new/delete operators in new.h - Define kernel panic handler in panic.h and implement in panic.cc - Establish basic type definitions in types.h - Create the kernel main entry point in main.cc with global initialization - Add synchronization primitives using spinlocks in spinlock.h and spinlock.cc - Define per-CPU state tracking for interrupts in cpu_state.h - Create a linker script for the kernel in linker.ld - Update module makefiles for kernel and library components