From e90b72ec3082588b296956730bd2930cf8d5d671 Mon Sep 17 00:00:00 2001 From: Richard Qin Date: Fri, 10 Jul 2026 11:31:46 +0800 Subject: refactor: promote new architecture to repository root Archive the deprecated implementation under lume-legacy, make the new kernel the default root-level build, and update repository entry points without changing kernel behavior. --- lume-legacy/include/drivers/uart.h | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 lume-legacy/include/drivers/uart.h (limited to 'lume-legacy/include/drivers/uart.h') diff --git a/lume-legacy/include/drivers/uart.h b/lume-legacy/include/drivers/uart.h new file mode 100644 index 0000000..a56624c --- /dev/null +++ b/lume-legacy/include/drivers/uart.h @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2026 Richard Qin + */ + +#pragma once +#include "common/types.h" +#include "drivers/uart_color.h" +#include "kernel/fdt.h" + +// UART register offsets (NS16550A) +#define RHR 0 // Receive Holding Register (read mode) +#define THR 0 // Transmit Holding Register (write mode) +#define IER 1 // Interrupt Enable Register +#define FCR 2 // FIFO Control Register +#define ISR 2 // Interrupt Status Register +#define LCR 3 // Line Control Register +#define LSR 5 // Line Status Register + +#define LSR_RX_READY 0x01 // input is waiting to be read from RHR +#define LSR_TX_IDLE 0x20 // THR can accept another character to send + +#define UART_RX_BUF_SIZE 128 + +// UART base address from FDT (use inline function to avoid macro issues) +static inline uint64 uart_base() { return g_devices.uart.base_addr; } + +namespace Drivers +{ + void uart_init(); + void uart_intr(); + int console_read(uint64 target, int len); + + void uart_putc(char c); + void uart_puts(const char *s); + void uart_put_int(int value); + void print_hex(uint64 value); +} \ No newline at end of file -- cgit v1.2.3