From b0ccdda4bc3af04e54677cd910ed04c5ba1b1a63 Mon Sep 17 00:00:00 2001 From: Richard Qin Date: Tue, 21 Apr 2026 23:05:54 +0800 Subject: feat: add RISC-V architecture configuration header with memory layout constants --- na/arch/riscv/include/arch/config.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 na/arch/riscv/include/arch/config.h (limited to 'na/arch/riscv/include') diff --git a/na/arch/riscv/include/arch/config.h b/na/arch/riscv/include/arch/config.h new file mode 100644 index 0000000..2a70f2a --- /dev/null +++ b/na/arch/riscv/include/arch/config.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2026 Richard Qin */ + +#pragma once + +/* + * RISC-V Architecture Configuration + * + * These constants define the architecture-specific memory layout. + * Each arch/ implementation must provide this header with the same symbols. + */ + +#include + +namespace arch { + +/* Kernel virtual address offset (higher-half base). + * SV39: top of 39-bit VA space. VA = PA + kVAOffset. */ +inline constexpr uint64 kVAOffset = 0xFFFFFFC000000000ULL; + +/* Physical memory base (where RAM starts on RISC-V virt platform) */ +inline constexpr uint64 kPhysBase = 0x80000000ULL; + +/* Platform default MMIO base addresses (QEMU virt) */ +inline constexpr uint64 kDefaultUartPA = 0x10000000ULL; +inline constexpr uint64 kDefaultPlicPA = 0x0C000000ULL; + +} // namespace arch -- cgit v1.2.3