From 1767d390fbf3d0c65389de46caf0b6d43ef3b6ad Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Fri, 10 Jul 2026 11:24:56 +0800
Subject: feat: establish bootable new architecture checkpoint

Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.
---
 na/arch/riscv/mm/tlb_md.cc | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 na/arch/riscv/mm/tlb_md.cc

(limited to 'na/arch/riscv/mm/tlb_md.cc')

diff --git a/na/arch/riscv/mm/tlb_md.cc b/na/arch/riscv/mm/tlb_md.cc
new file mode 100644
index 0000000..ed9aa29
--- /dev/null
+++ b/na/arch/riscv/mm/tlb_md.cc
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Copyright (C) 2026 Richard Qin */
+
+#include <arch/tlb.h>
+#include <arch/sbi.h>
+
+namespace arch::tlb {
+
+void flush_remote(uint64 cpu_mask, uint64 start, uint64 size) {
+    if (size == ~0ULL) {
+        arch::sbi::sbi_remote_sfence_vma(cpu_mask, 0, 0, ~0UL);
+    } else {
+        arch::sbi::sbi_remote_sfence_vma(cpu_mask, 0, start, size);
+    }
+}
+
+} // namespace arch::tlb
-- 
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