From 1767d390fbf3d0c65389de46caf0b6d43ef3b6ad Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Fri, 10 Jul 2026 11:24:56 +0800
Subject: feat: establish bootable new architecture checkpoint

Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.
---
 na/test/module.mk | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

(limited to 'na/test/module.mk')

diff --git a/na/test/module.mk b/na/test/module.mk
index da6c065..47a693c 100644
--- a/na/test/module.mk
+++ b/na/test/module.mk
@@ -3,6 +3,8 @@ SRCS_CC += test/selftest.cc
 SRCS_CC += test/test_pmm.cc
 SRCS_CC += test/test_slab.cc
 SRCS_CC += test/test_spinlock.cc
+SRCS_CC += test/test_mutex.cc
+SRCS_CC += test/test_driver_model.cc
 SRCS_CC += test/test_rbtree.cc
 SRCS_CC += test/test_vmm.cc
 SRCS_CC += test/test_vma.cc
@@ -12,7 +14,17 @@ SRCS_CC += test/test_trap.cc
 SRCS_CC += test/test_sched.cc
 SRCS_CC += test/test_klog.cc
 SRCS_CC += test/test_random.cc
-SRCS_CC += test/test_reloc.cc
 SRCS_CC += test/test_waitqueue.cc
 SRCS_CC += test/test_uaccess.cc
 SRCS_CC += test/test_sys_mm.cc
+SRCS_CC += test/test_smp.cc
+SRCS_CC += test/test_dcache.cc
+SRCS_CC += test/test_namei.cc
+SRCS_CC += test/test_vfs_io.cc
+SRCS_CC += test/test_exec.cc
+SRCS_CC += test/test_pipe_devfs.cc
+SRCS_CC += test/test_sys_process.cc
+SRCS_CC += test/test_signal.cc
+SRCS_CC += test/test_pid.cc
+SRCS_CC += test/test_sys_fs_extra.cc
+SRCS_CC += test/test_page_cache.cc
-- 
cgit v1.2.3