<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rcc-project/backend/include/rcc/CodeGen/MachineOperand.h, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/'/>
<updated>2026-08-22T10:49:08Z</updated>
<entry>
<title>[CodeGen] Generate RISC-V macro fusion rules</title>
<updated>2026-08-22T10:49:08Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-22T10:49:08Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=8a4bb6e3b0bffa0ed79b51347b12ee4293b622a7'/>
<id>urn:sha1:8a4bb6e3b0bffa0ed79b51347b12ee4293b622a7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV][GlobalISel] Select and expand global addresses</title>
<updated>2026-08-18T20:27:41Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-18T20:27:41Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=307fc0961972ac5264d6f3459978fbec95cad3a9'/>
<id>urn:sha1:307fc0961972ac5264d6f3459978fbec95cad3a9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[GlobalISel] Legalize G_ABS</title>
<updated>2026-08-14T14:37:46Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-14T14:37:46Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=b85a348ab7bdd878fd975121fc2501625eceec95'/>
<id>urn:sha1:b85a348ab7bdd878fd975121fc2501625eceec95</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Match LLVM machine copy propagation</title>
<updated>2026-08-13T13:11:10Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-13T13:11:10Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a'/>
<id>urn:sha1:cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[Support] Split APInt and APFloat ownership</title>
<updated>2026-08-12T22:52:15Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T22:52:15Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=aa7c85ca71859aab15bdf1e6dc1ea3a5aa5d1e28'/>
<id>urn:sha1:aa7c85ca71859aab15bdf1e6dc1ea3a5aa5d1e28</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[MIR] Accept fixed-baseline LLVM syntax</title>
<updated>2026-08-11T09:37:42Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T09:37:42Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0'/>
<id>urn:sha1:6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement machine optimization and scheduling</title>
<updated>2026-08-09T09:03:19Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-09T09:03:19Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=495c675771f43cfa12ab7a426a538be72fec1805'/>
<id>urn:sha1:495c675771f43cfa12ab7a426a538be72fec1805</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement machine SSA exit</title>
<updated>2026-08-07T20:14:34Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-07T20:14:34Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=77884c967d1cbc48afcbaef7e5a35adcb3c5da1b'/>
<id>urn:sha1:77884c967d1cbc48afcbaef7e5a35adcb3c5da1b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[MIR] Complete document parsing and printing</title>
<updated>2026-08-06T17:27:41Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-06T17:27:41Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=76d89700953ddd81cf31ab8f260eddf67e93aa85'/>
<id>urn:sha1:76d89700953ddd81cf31ab8f260eddf67e93aa85</id>
<content type='text'>
Implement the single LLVM-compatible MIR document path with structured\nembedded-IR references, YAML mappings, constants, and deterministic printing.\n\nKeep pointer LLT widths DataLayout-derived, reject layout-dependent output\nwhen embedded IR is omitted, and record the fixed-baseline compatibility\ncontract and regression coverage.
</content>
</entry>
<entry>
<title>[CodeGen] Model complete MIR operands</title>
<updated>2026-08-03T10:31:58Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-03T10:31:58Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6580ac1c05bd1cbccd2dcd71fd9c2a384ae3db56'/>
<id>urn:sha1:6580ac1c05bd1cbccd2dcd71fd9c2a384ae3db56</id>
<content type='text'>
</content>
</entry>
</feed>
