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<title>rcc-project/backend/include/rcc/CodeGen/MachineVerifier.h, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/'/>
<updated>2026-08-01T08:07:24Z</updated>
<entry>
<title>[CodeGen] Add target register descriptions</title>
<updated>2026-08-01T08:07:24Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T08:07:24Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=924dcd36ebed84f04729de05ec08b311a36a04c1'/>
<id>urn:sha1:924dcd36ebed84f04729de05ec08b311a36a04c1</id>
<content type='text'>
Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.
</content>
</entry>
<entry>
<title>[CodeGen] Add strict MachineIR verification</title>
<updated>2026-08-01T05:24:09Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T05:24:09Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=19d8e4f562a8583b002dbaa837ec0083e7768a4f'/>
<id>urn:sha1:19d8e4f562a8583b002dbaa837ec0083e7768a4f</id>
<content type='text'>
Verify arena catalogs, intrusive layouts, reciprocal CFG edges, operand ownership, exact def-use coverage, instruction descriptors, pseudo deadlines, and MachineFunctionProperties. Preserve monotonic-arena history while rejecting detached objects that retain live state.
</content>
</entry>
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