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<title>rcc-project/backend/include/rcc/CodeGen/TargetCodeGen.h, branch master</title>
<subtitle>An optimizing compiler for C.
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<updated>2026-08-12T13:56:37Z</updated>
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<title>[GlobalISel] Split the generic pipeline components</title>
<updated>2026-08-12T13:56:37Z</updated>
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<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-12T13:56:37Z</published>
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<title>[RISCV] Consolidate instruction behavior in RISCVInstrInfo</title>
<updated>2026-08-12T13:35:21Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-12T13:35:21Z</published>
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<title>[MIR] Accept fixed-baseline LLVM syntax</title>
<updated>2026-08-11T09:37:42Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-11T09:37:42Z</published>
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<title>[CodeGen] Implement machine SSA exit</title>
<updated>2026-08-07T20:14:34Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-07T20:14:34Z</published>
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<title>[CodeGen] Implement RV64GC legalization and instruction selection</title>
<updated>2026-08-07T18:58:50Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-07T18:58:50Z</published>
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