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<title>rcc-project/backend/include/rcc/CodeGen/TargetInstrInfo.h, branch master</title>
<subtitle>An optimizing compiler for C.
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<updated>2026-08-24T08:18:45Z</updated>
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<title>[CodeGen] Implement RISC-V peephole branch optimization</title>
<updated>2026-08-24T08:18:45Z</updated>
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<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-24T08:18:45Z</published>
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<title>[CodeGen] Match LLVM machine copy propagation</title>
<updated>2026-08-13T13:11:10Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-13T13:11:10Z</published>
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<entry>
<title>[RISCV] Consolidate instruction behavior in RISCVInstrInfo</title>
<updated>2026-08-12T13:35:21Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T13:35:21Z</published>
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<title>[CodeGen] Add TargetInstrInfo ownership</title>
<updated>2026-08-12T12:39:04Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
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<published>2026-08-12T12:39:04Z</published>
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