rcc-project/backend/include/rcc/Target/RISCV/RISCVPipeline.h, branch master

rcc-project/backend/include/rcc/Target/RISCV/RISCVPipeline.h, branch master An optimizing compiler for C. https://git.richardqin.org/rcc-project/atom?h=master 2026-08-28T10:51:10Z [CodeGen] Add target machine registry 2026-08-28T10:51:10Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-28T10:51:10Z urn:sha1:f89d528efc0228c049c2867dcba886a56bac8619 [CodeGen] Implement RISC-V machine outlining 2026-08-24T18:21:25Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-24T18:21:25Z urn:sha1:71988f9818677df0d90b19d4bb770ac8a6116e62 [RISCV] Match LLVM emergency spill layout 2026-08-24T09:30:29Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-24T09:30:29Z urn:sha1:81afb6570000472c182e5b1f540f69382602aaad [CodeGen] Generate RISC-V macro fusion rules 2026-08-22T10:49:08Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-22T10:49:08Z urn:sha1:8a4bb6e3b0bffa0ed79b51347b12ee4293b622a7 [RISCV][GlobalISel] Legalize floating-point remainder 2026-08-15T12:03:59Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-15T12:03:59Z urn:sha1:5b6ba4568cf6916a61ecde702f45246db8154b9f [GlobalISel] Match LLVM CSE builder result semantics 2026-08-14T16:38:20Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-14T16:38:20Z urn:sha1:f6fdfb8d484b4e52cdb24a94a31b0f00d41a5eb7 [CodeGen] Match LLVM machine copy propagation 2026-08-13T13:11:10Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-13T13:11:10Z urn:sha1:cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a [CodeGen] Align pass manager ownership 2026-08-12T21:45:37Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-12T21:45:37Z urn:sha1:236082a0fe4dcd0362c5c74923a93e3db6a01291 [RISCV] Split the GlobalISel target components 2026-08-12T14:37:49Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-12T14:37:49Z urn:sha1:3341938bb644e6fc39afa6a8fcb1306604999e42 [Tooling] Remove the duplicate assembly emitter 2026-08-12T11:46:28Z Richard-Qin-X richard.qin.001@gmail.com 2026-08-12T11:46:28Z urn:sha1:2ef71f86a2b3e23967e8af08ba1eaaa950f0e1b5