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<title>rcc-project/backend/lib/CodeGen/MachineVerifier.cpp, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
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<updated>2026-08-24T08:37:25Z</updated>
<entry>
<title>[RISCV] Match LLVM frame lowering semantics</title>
<updated>2026-08-24T08:37:25Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T08:37:25Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=540c73a2f450af3d0aec6e039fab054471efdbb1'/>
<id>urn:sha1:540c73a2f450af3d0aec6e039fab054471efdbb1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV][GlobalISel] Select constant operands as immediates</title>
<updated>2026-08-15T17:09:11Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-15T17:09:11Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=72a559302280a3837efea331829b70d9bb218f7a'/>
<id>urn:sha1:72a559302280a3837efea331829b70d9bb218f7a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[GlobalISel] Clear virtual register types after selection</title>
<updated>2026-08-15T15:33:09Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-15T15:33:09Z</published>
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<id>urn:sha1:1fe32a79cee5cae6dea6fbb1d9f15f7db817a356</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV][GlobalISel] Legalize floating-point remainder</title>
<updated>2026-08-15T12:03:59Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-15T12:03:59Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=5b6ba4568cf6916a61ecde702f45246db8154b9f'/>
<id>urn:sha1:5b6ba4568cf6916a61ecde702f45246db8154b9f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Unify scalar low-level types</title>
<updated>2026-08-13T15:55:38Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-13T15:55:38Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=aa69e15c6909c3b162b15f5326f0a72ba9bb7163'/>
<id>urn:sha1:aa69e15c6909c3b162b15f5326f0a72ba9bb7163</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Reuse register diagnostic formatting</title>
<updated>2026-08-13T09:37:13Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-13T09:37:13Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=2aafd0a0d48a2fbca2b75eef0116fe096dc8610b'/>
<id>urn:sha1:2aafd0a0d48a2fbca2b75eef0116fe096dc8610b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Split machine liveness components</title>
<updated>2026-08-12T20:17:52Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T20:17:52Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=a2f8d7c5e22b510965327383410bd576f7cf28e7'/>
<id>urn:sha1:a2f8d7c5e22b510965327383410bd576f7cf28e7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Split the GlobalISel target components</title>
<updated>2026-08-12T14:37:49Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T14:37:49Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=3341938bb644e6fc39afa6a8fcb1306604999e42'/>
<id>urn:sha1:3341938bb644e6fc39afa6a8fcb1306604999e42</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[MIR] Accept fixed-baseline LLVM syntax</title>
<updated>2026-08-11T09:37:42Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T09:37:42Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0'/>
<id>urn:sha1:6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement RV64GC frame lowering</title>
<updated>2026-08-09T05:23:48Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-09T05:23:48Z</published>
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<id>urn:sha1:da8bc76b4bf7d1a7b025d6c8ef5809551467dcc7</id>
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