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<title>rcc-project/backend/lib/Target/RISCV/CMakeLists.txt, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
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<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
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<updated>2026-08-28T15:53:31Z</updated>
<entry>
<title>[CMake] Remove unused clang-tidy file registration</title>
<updated>2026-08-28T15:53:31Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-28T15:53:31Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=f0cfb240d80cb9f4444fb996350c1f88bc69a142'/>
<id>urn:sha1:f0cfb240d80cb9f4444fb996350c1f88bc69a142</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Generate complete Zcmp instruction definitions</title>
<updated>2026-08-28T11:15:07Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-28T11:15:07Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=b1c08d57f1637f5ee813d1409dacdfa88c1509a0'/>
<id>urn:sha1:b1c08d57f1637f5ee813d1409dacdfa88c1509a0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Add target machine registry</title>
<updated>2026-08-28T10:51:10Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-28T10:51:10Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=f89d528efc0228c049c2867dcba886a56bac8619'/>
<id>urn:sha1:f89d528efc0228c049c2867dcba886a56bac8619</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Separate assembly emission ownership</title>
<updated>2026-08-28T06:25:42Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-28T06:25:42Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6889b82a5c9ecc6bd178760c66653d7af0121162'/>
<id>urn:sha1:6889b82a5c9ecc6bd178760c66653d7af0121162</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Separate calling convention assignment</title>
<updated>2026-08-28T06:07:11Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-28T06:07:11Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6e8feb15a0d256ca19e88185f78c81f689ce7d34'/>
<id>urn:sha1:6e8feb15a0d256ca19e88185f78c81f689ce7d34</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Generate atomic RMW selection</title>
<updated>2026-08-27T08:27:25Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-27T08:27:25Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=dd477bc887546b00144ea6c0a3e03ad366661636'/>
<id>urn:sha1:dd477bc887546b00144ea6c0a3e03ad366661636</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Implement push-pop optimization</title>
<updated>2026-08-26T09:56:11Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-26T09:55:16Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=7b3dcced70be227bb43e71d84d11a2f15fb25072'/>
<id>urn:sha1:7b3dcced70be227bb43e71d84d11a2f15fb25072</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement RISC-V finalize-isel</title>
<updated>2026-08-26T09:38:21Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-26T09:38:21Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=36c4344ddf1866005c62910166ca077bf2e8f62e'/>
<id>urn:sha1:36c4344ddf1866005c62910166ca077bf2e8f62e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Optimize W instructions</title>
<updated>2026-08-25T16:34:09Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-25T16:34:09Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=73ff142aa16a29c18d09564f0b7e41940fcf786c'/>
<id>urn:sha1:73ff142aa16a29c18d09564f0b7e41940fcf786c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Implement make-compressible pass</title>
<updated>2026-08-24T18:38:56Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T18:38:56Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=c3932f55208e3fe2019d26a0e5af421c0b644872'/>
<id>urn:sha1:c3932f55208e3fe2019d26a0e5af421c0b644872</id>
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