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<title>rcc-project/backend/lib/Target/RISCV/RISCV.h, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
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<updated>2026-08-26T09:56:11Z</updated>
<entry>
<title>[RISCV] Implement push-pop optimization</title>
<updated>2026-08-26T09:56:11Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-26T09:55:16Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=7b3dcced70be227bb43e71d84d11a2f15fb25072'/>
<id>urn:sha1:7b3dcced70be227bb43e71d84d11a2f15fb25072</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement RISC-V finalize-isel</title>
<updated>2026-08-26T09:38:21Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-26T09:38:21Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=36c4344ddf1866005c62910166ca077bf2e8f62e'/>
<id>urn:sha1:36c4344ddf1866005c62910166ca077bf2e8f62e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Optimize W instructions</title>
<updated>2026-08-25T16:34:09Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-25T16:34:09Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=73ff142aa16a29c18d09564f0b7e41940fcf786c'/>
<id>urn:sha1:73ff142aa16a29c18d09564f0b7e41940fcf786c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Implement make-compressible pass</title>
<updated>2026-08-24T18:38:56Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T18:38:56Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=c3932f55208e3fe2019d26a0e5af421c0b644872'/>
<id>urn:sha1:c3932f55208e3fe2019d26a0e5af421c0b644872</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Implement base offset merging</title>
<updated>2026-08-24T17:50:02Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T17:50:02Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=6dc798fbdbef20670317742a8c1d12f47e9d1c05'/>
<id>urn:sha1:6dc798fbdbef20670317742a8c1d12f47e9d1c05</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Implement Zcmp move merging</title>
<updated>2026-08-24T17:43:04Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T17:43:04Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=9e89d1d718977749ca798b27b7ad45e1781602c2'/>
<id>urn:sha1:9e89d1d718977749ca798b27b7ad45e1781602c2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Match LLVM compressed stack frame lowering</title>
<updated>2026-08-24T10:27:25Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T10:27:25Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=f430936038432e90b2d70e08ac51620931651450'/>
<id>urn:sha1:f430936038432e90b2d70e08ac51620931651450</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Match LLVM emergency spill layout</title>
<updated>2026-08-24T09:30:29Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T09:30:29Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=81afb6570000472c182e5b1f540f69382602aaad'/>
<id>urn:sha1:81afb6570000472c182e5b1f540f69382602aaad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Match LLVM frame lowering semantics</title>
<updated>2026-08-24T08:37:25Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-24T08:37:25Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=540c73a2f450af3d0aec6e039fab054471efdbb1'/>
<id>urn:sha1:540c73a2f450af3d0aec6e039fab054471efdbb1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Generate RISC-V macro fusion rules</title>
<updated>2026-08-22T10:49:08Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-22T10:49:08Z</published>
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<id>urn:sha1:8a4bb6e3b0bffa0ed79b51347b12ee4293b622a7</id>
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