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<title>rcc-project/backend/lib/Target/RISCV/RISCVCallLowering.cpp, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
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<updated>2026-08-12T14:37:49Z</updated>
<entry>
<title>[RISCV] Split the GlobalISel target components</title>
<updated>2026-08-12T14:37:49Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T14:37:49Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=3341938bb644e6fc39afa6a8fcb1306604999e42'/>
<id>urn:sha1:3341938bb644e6fc39afa6a8fcb1306604999e42</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Model typed floating-point register views</title>
<updated>2026-08-11T15:44:57Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T15:44:57Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=e6cd1347cc2c76babe56842e1b7bd05d68fe9584'/>
<id>urn:sha1:e6cd1347cc2c76babe56842e1b7bd05d68fe9584</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Order call operands like LLVM MIR</title>
<updated>2026-08-11T12:37:03Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T12:37:03Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=234d7d3bec020103e46daaff39d207d978479730'/>
<id>urn:sha1:234d7d3bec020103e46daaff39d207d978479730</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Add LP64 calling-convention facts</title>
<updated>2026-08-11T12:26:56Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T12:26:56Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=38626ed37c9ea78c76c12dae4806b750881fd910'/>
<id>urn:sha1:38626ed37c9ea78c76c12dae4806b750881fd910</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Remove redundant numeric call-site IDs</title>
<updated>2026-08-11T12:16:09Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T12:16:09Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=cd2e88b9618ba7c2f6fcfac901e81f4a302a34c9'/>
<id>urn:sha1:cd2e88b9618ba7c2f6fcfac901e81f4a302a34c9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Match LLVM call-frame pseudo semantics</title>
<updated>2026-08-11T12:08:36Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T12:08:36Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=551f0b3fcd6f797ed6dca90f39123b0359396dcb'/>
<id>urn:sha1:551f0b3fcd6f797ed6dca90f39123b0359396dcb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Use canonical copies for full ABI values</title>
<updated>2026-08-11T11:54:56Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T11:54:56Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=8b797159e6c8fe1294fd2d26de3bd0992c61ea24'/>
<id>urn:sha1:8b797159e6c8fe1294fd2d26de3bd0992c61ea24</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[RISCV] Accept generic scalars in call lowering</title>
<updated>2026-08-11T11:42:45Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T11:42:45Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=2271b7b102ae0e5f2a1246bf6e615f3ac128c8bd'/>
<id>urn:sha1:2271b7b102ae0e5f2a1246bf6e615f3ac128c8bd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Complete machine pass and ABI lowering infrastructure</title>
<updated>2026-08-07T14:06:28Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-07T14:06:28Z</published>
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<id>urn:sha1:f99ef4322a7a2c09380fff61f88ab9440f05a92c</id>
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