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<title>rcc-project/backend/unittests/CodeGen/MachineFunctionClonerTest.cpp, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
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<updated>2026-08-13T15:55:38Z</updated>
<entry>
<title>[CodeGen] Unify scalar low-level types</title>
<updated>2026-08-13T15:55:38Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-13T15:55:38Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=aa69e15c6909c3b162b15f5326f0a72ba9bb7163'/>
<id>urn:sha1:aa69e15c6909c3b162b15f5326f0a72ba9bb7163</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[Support] Split APInt and APFloat ownership</title>
<updated>2026-08-12T22:52:15Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T22:52:15Z</published>
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<id>urn:sha1:aa7c85ca71859aab15bdf1e6dc1ea3a5aa5d1e28</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Test cloning unnamed functions</title>
<updated>2026-08-11T17:16:51Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-11T17:16:51Z</published>
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<id>urn:sha1:785805863cbee537ba1e963ff177265171801aeb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[MIR] Complete document parsing and printing</title>
<updated>2026-08-06T17:27:41Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-06T17:27:41Z</published>
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<id>urn:sha1:76d89700953ddd81cf31ab8f260eddf67e93aa85</id>
<content type='text'>
Implement the single LLVM-compatible MIR document path with structured\nembedded-IR references, YAML mappings, constants, and deterministic printing.\n\nKeep pointer LLT widths DataLayout-derived, reject layout-dependent output\nwhen embedded IR is omitted, and record the fixed-baseline compatibility\ncontract and regression coverage.
</content>
</entry>
<entry>
<title>[MIR] Add machine instruction parser and printer</title>
<updated>2026-08-03T21:34:15Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-03T21:34:15Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=183e2354e9fdd107be420cbb185c1d239434aa48'/>
<id>urn:sha1:183e2354e9fdd107be420cbb185c1d239434aa48</id>
<content type='text'>
Parse MachineFunction bodies in two passes and serialize the same MachineIR model in complete or readable form. Extend instruction attachments and memory operands required by the fixed LLVM MIR grammar, and cover deterministic parse-print round trips.
</content>
</entry>
<entry>
<title>[CodeGen] Add target MIR text schema</title>
<updated>2026-08-03T11:24:30Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-03T11:24:30Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=432efe39315ed5ad0162f9c08dbf10941bc21dc1'/>
<id>urn:sha1:432efe39315ed5ad0162f9c08dbf10941bc21dc1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Add target register descriptions</title>
<updated>2026-08-01T08:07:24Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T08:07:24Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=924dcd36ebed84f04729de05ec08b311a36a04c1'/>
<id>urn:sha1:924dcd36ebed84f04729de05ec08b311a36a04c1</id>
<content type='text'>
Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.
</content>
</entry>
<entry>
<title>[CodeGen] Add target state and compilation status</title>
<updated>2026-08-01T06:50:04Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T06:50:04Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=cfdbcc469f9691bd9dce3b0b86982a63d86ca6b7'/>
<id>urn:sha1:cfdbcc469f9691bd9dce3b0b86982a63d86ca6b7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Add constant and jump table state</title>
<updated>2026-08-01T06:19:20Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T06:19:20Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=a69d14b8ebc028dddc689658b08d42d3e83f5e38'/>
<id>urn:sha1:a69d14b8ebc028dddc689658b08d42d3e83f5e38</id>
<content type='text'>
Add stable, tombstone-preserving MachineConstantPool and MachineJumpTableInfo ownership. Define the versioned TargetConstant contract and integrate all table references with builders, verification, and deterministic deep cloning.
</content>
</entry>
<entry>
<title>[CodeGen] Add MachineFrameInfo</title>
<updated>2026-08-01T05:55:21Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T05:55:21Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=c9634fa9f529afbdf622a9cd96741bd09d14ef86'/>
<id>urn:sha1:c9634fa9f529afbdf622a9cd96741bd09d14ef86</id>
<content type='text'>
Model stable frame indices, stack object kinds, tombstones, lifetimes, and frozen layouts. Validate owned frame references in the builder and verifier, and remap complete frame state during MachineFunction cloning.
</content>
</entry>
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