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<title>rcc-project/backend/unittests/CodeGen/MachineIRCoreTest.cpp, branch master</title>
<subtitle>An optimizing compiler for C.
</subtitle>
<id>https://git.richardqin.org/rcc-project/atom?h=master</id>
<link rel='self' href='https://git.richardqin.org/rcc-project/atom?h=master'/>
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<updated>2026-08-13T15:55:38Z</updated>
<entry>
<title>[CodeGen] Unify scalar low-level types</title>
<updated>2026-08-13T15:55:38Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-13T15:55:38Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=aa69e15c6909c3b162b15f5326f0a72ba9bb7163'/>
<id>urn:sha1:aa69e15c6909c3b162b15f5326f0a72ba9bb7163</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[Support] Split APInt and APFloat ownership</title>
<updated>2026-08-12T22:52:15Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-12T22:52:15Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=aa7c85ca71859aab15bdf1e6dc1ea3a5aa5d1e28'/>
<id>urn:sha1:aa7c85ca71859aab15bdf1e6dc1ea3a5aa5d1e28</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Implement RV64GC frame lowering</title>
<updated>2026-08-09T05:23:48Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-09T05:23:48Z</published>
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<id>urn:sha1:da8bc76b4bf7d1a7b025d6c8ef5809551467dcc7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[CodeGen] Model machine debug metadata</title>
<updated>2026-08-01T19:37:46Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-08-01T19:37:46Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=a8a9d7d926202450645deae872d4d9dc11d63215'/>
<id>urn:sha1:a8a9d7d926202450645deae872d4d9dc11d63215</id>
<content type='text'>
Replace marker-based metadata operands with scoped references and inline DIExpression values. Add structured DILocation chains, instruction debug attachments, stack variable records, and entry values with unified verification, builder support, and deterministic cloning.
</content>
</entry>
<entry>
<title>[CodeGen] Build the core MachineIR object model</title>
<updated>2026-07-31T21:27:13Z</updated>
<author>
<name>Richard-Qin-X</name>
<email>richard.qin.001@gmail.com</email>
</author>
<published>2026-07-31T21:27:13Z</published>
<link rel='alternate' type='text/html' href='https://git.richardqin.org/rcc-project/commit/?id=c759cebef15bdac2ef160065efd116fe6ed540a7'/>
<id>urn:sha1:c759cebef15bdac2ef160065efd116fe6ed540a7</id>
<content type='text'>
Add arena-owned, address-stable MachineFunction, MachineBasicBlock, and MachineInstr nodes with intrusive layout and instruction lists. Model every required MachineOperand category, reciprocal ties, source state, and immutable per-instruction memory references.

Implement physical and virtual register def-use chains whose back-links survive operand vector moves, plus vreg properties, tombstones, live-ins, reserved registers, and atomic CFG updates. Exercise ownership, reallocation, unlink/relink, cross-function rejection, and sanitizer paths.
</content>
</entry>
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