diff options
Diffstat (limited to 'backend/lib/Target/RISCV/RISCVMachineMemoryFolding.cpp')
| -rw-r--r-- | backend/lib/Target/RISCV/RISCVMachineMemoryFolding.cpp | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/backend/lib/Target/RISCV/RISCVMachineMemoryFolding.cpp b/backend/lib/Target/RISCV/RISCVMachineMemoryFolding.cpp new file mode 100644 index 0000000..2cc5f24 --- /dev/null +++ b/backend/lib/Target/RISCV/RISCVMachineMemoryFolding.cpp @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "rcc/CodeGen/MachineFunction.h" +#include "rcc/CodeGen/MachineInstr.h" +#include "rcc/CodeGen/TargetDescription.h" +#include "rcc/Target/RISCV/RISCVCodeGen.h" + +#include <cstddef> +#include <optional> + +namespace rcc::riscv { +namespace { + +class RISCVMachineMemoryFoldingInfo final : public TargetMemoryFoldingInfo { +public: + [[nodiscard]] Expected<bool> canFoldMemoryOperand(const MachineInstr &, std::size_t, + const MachineInstr &, const MachineFunction &, + const TargetDescription &) const override { + return false; + } + + [[nodiscard]] Expected<MachineInstr *> + foldMemoryOperand(MachineInstr &, std::size_t, MachineInstr &, MachineFunction &, + const TargetDescription &) const override { + return makeUnexpected(ErrorCode::Unsupported, + "RV64GC has no register instruction form with a folded memory operand"); + } + + [[nodiscard]] Expected<bool> unfoldMemoryOperand(MachineInstr &, MachineFunction &, + const TargetDescription &) const override { + return false; + } + + [[nodiscard]] Expected<std::optional<MemorySize>> + getFoldedMemorySize(const MachineInstr &, const MachineFunction &, + const TargetDescription &) const override { + return std::optional<MemorySize>{}; + } +}; + +} // namespace + +const TargetMemoryFoldingInfo &memoryFoldingInfo() noexcept { + static const RISCVMachineMemoryFoldingInfo Value; + return Value; +} + +} // namespace rcc::riscv |
