| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | [CodeGen] Add target register descriptions | Richard-Qin-X | 2026-08-01 | 24 | -156/+2821 |
| * | [CodeGen] Add target state and compilation status | Richard-Qin-X | 2026-08-01 | 15 | -0/+1470 |
| * | [CodeGen] Add constant and jump table state | Richard-Qin-X | 2026-08-01 | 21 | -42/+2427 |
| * | [CodeGen] Add MachineFrameInfo | Richard-Qin-X | 2026-08-01 | 13 | -20/+876 |
| * | [CodeGen] Add explicit MachineFunction cloning | Richard-Qin-X | 2026-08-01 | 5 | -0/+885 |
| * | [CodeGen] Add strict MachineIR verification | Richard-Qin-X | 2026-08-01 | 7 | -0/+1044 |
| * | [CodeGen] Add transactional MachineIR builder | Richard-Qin-X | 2026-08-01 | 9 | -72/+1368 |
| * | [CMake] Match LLVM EH and RTTI defaults | Richard-Qin-X | 2026-08-01 | 3 | -10/+25 |
| * | [CodeGen] Add machine instruction descriptors | Richard-Qin-X | 2026-08-01 | 7 | -0/+1186 |
| * | [CodeGen] Build the core MachineIR object model | Richard-Qin-X | 2026-08-01 | 16 | -0/+2935 |
| * | [CodeGen] Add machine IR value semantics | Richard-Qin-X | 2026-08-01 | 9 | -5/+1071 |
| * | [CodeGen] Add core machine type primitives | Richard-Qin-X | 2026-08-01 | 12 | -0/+1273 |
| * | [Backend] Establish standalone build infrastructure | Richard-Qin-X | 2026-08-01 | 20 | -22/+650 |
| * | [legacy] Add functional and performance test suites | Richard-Qin-X | 2026-06-08 | 1837 | -0/+463184 |
| * | [legacy] Add compiler driver | Richard-Qin-X | 2026-06-08 | 1 | -0/+386 |
| * | [legacy/backend] Add RISC-V 64 instruction selection, regalloc, and emission | Richard-Qin-X | 2026-06-08 | 9 | -0/+4209 |
| * | [legacy/mid] Add target-independent ABI lowering | Richard-Qin-X | 2026-06-08 | 1 | -0/+45 |
| * | [legacy/mid] Add interprocedural passes: inlining and tail-recursion elimination | Richard-Qin-X | 2026-06-08 | 2 | -0/+698 |
| * | [legacy/mid] Add control-flow optimization: if-conversion | Richard-Qin-X | 2026-06-08 | 1 | -0/+127 |
| * | [legacy/mid] Add loop idiom recognition: memset/memcpy, scalar replacement, r... | Richard-Qin-X | 2026-06-08 | 3 | -0/+1457 |
| * | [legacy/mid] Add loop restructuring: unrolling, unswitching, interchange, dea... | Richard-Qin-X | 2026-06-08 | 4 | -0/+1990 |
| * | [legacy/mid] Add loop-invariant and induction-variable optimization: LICM, LSR | Richard-Qin-X | 2026-06-08 | 2 | -0/+1214 |
| * | [legacy/mid] Add strength reduction for constant div and mul | Richard-Qin-X | 2026-06-08 | 2 | -0/+397 |
| * | [legacy/mid] Add scalar optimizations: fold, copy, GVN, GCM, SCCP, reassociat... | Richard-Qin-X | 2026-06-08 | 7 | -0/+2604 |
| * | [legacy/mid] Add memory SSA: construction, promotion, load/store optimization | Richard-Qin-X | 2026-06-08 | 4 | -0/+1952 |
| * | [legacy/mid] Add analysis passes: CFG, dominance, liveness, loops, alias | Richard-Qin-X | 2026-06-08 | 4 | -0/+1451 |
| * | [legacy/ir] Add SSA IR generation | Richard-Qin-X | 2026-06-08 | 4 | -0/+1688 |
| * | [legacy/frontend] Add lexer, parser, and AST | Richard-Qin-X | 2026-06-08 | 3 | -0/+995 |
| * | [legacy] Add core utilities: BSet, arena allocator, interning | Richard-Qin-X | 2026-06-08 | 1 | -0/+778 |
| * | [legacy] Add IR, AST, and RISC-V target headers | Richard-Qin-X | 2026-06-08 | 9 | -0/+2111 |
| * | [legacy] Add build system and project metadata | Richard-Qin-X | 2026-06-08 | 7 | -0/+1179 |
| * | [repo] Add project README | Richard-Qin-X | 2026-06-08 | 1 | -0/+12 |
| * | [repo] Add clang-format and clang-tidy configuration | Richard-Qin-X | 2026-06-08 | 3 | -0/+49 |
| * | [repo] Add license and gitignore | Richard-Qin-X | 2026-06-08 | 2 | -0/+764 |
