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* [CodeGen] Remove RCC fallthrough normalizationRichard-Qin-X2026-08-195-270/+0
* [CodeGen] Match LLVM block placement contractRichard-Qin-X2026-08-191-6/+2
* [CodeGen] Unify LLVM branch folding pipelineRichard-Qin-X2026-08-197-469/+310
* [CodeGen] Match LLVM tail duplication contractRichard-Qin-X2026-08-191-9/+1
* [CodeGen] Match LLVM post-machine scheduler contractRichard-Qin-X2026-08-191-7/+1
* [CodeGen] Match LLVM post-RA pseudo expansion contractRichard-Qin-X2026-08-191-7/+1
* [CodeGen] Remove non-LLVM machine DCE placementsRichard-Qin-X2026-08-192-8/+2
* [CodeGen] Remove unsupported post-frame combinerRichard-Qin-X2026-08-194-25/+1
* [CodeGen] Remove unsupported pre-PEI pseudo expansionRichard-Qin-X2026-08-196-57/+3
* [CodeGen] Match LLVM shrink wrapping contractRichard-Qin-X2026-08-191-7/+1
* [CodeGen] Match LLVM post-RA sink contractRichard-Qin-X2026-08-191-3/+1
* [CodeGen] Match LLVM post-RA LICM contractRichard-Qin-X2026-08-191-3/+1
* [CodeGen] Match LLVM post-RA combiner contractRichard-Qin-X2026-08-191-1/+1
* [CodeGen] Match LLVM stack slot coloring contractRichard-Qin-X2026-08-191-6/+1
* [CodeGen] Match LLVM PBQP allocator input contractRichard-Qin-X2026-08-191-4/+2
* [CodeGen] Match LLVM machine scheduler contractRichard-Qin-X2026-08-191-6/+1
* [CodeGen] Match LLVM machine sink input contractRichard-Qin-X2026-08-191-2/+2
* [CodeGen] Match LLVM prologepilog input contractRichard-Qin-X2026-08-191-2/+1
* [GlobalISel] Generate prelegalizer combiner rulesRichard-Qin-X2026-08-1919-16/+1381
* [RISCV][GlobalISel] Select and expand global addressesRichard-Qin-X2026-08-1931-19/+495
* [RISCV][GlobalISel] Generate integer store selectionRichard-Qin-X2026-08-192-80/+76
* [RISCV][GlobalISel] Generate integer load selectionRichard-Qin-X2026-08-199-80/+346
* [RISCV][GlobalISel] Generate frame index selectionRichard-Qin-X2026-08-192-0/+17
* [RISCV][GlobalISel] Correct floating constant materializationRichard-Qin-X2026-08-191-3/+16
* [RISCV][GlobalISel] Match floating comparisonsRichard-Qin-X2026-08-1910-159/+471
* [RISCV][GlobalISel] Generate trap selectionRichard-Qin-X2026-08-193-16/+28
* [RISCV][GlobalISel] Generate select instruction matchingRichard-Qin-X2026-08-195-161/+229
* [RISCV][GlobalISel] Generate indirect branch selectionRichard-Qin-X2026-08-1913-22/+143
* [RISCV][GlobalISel] Generate conditional branch selectionRichard-Qin-X2026-08-1711-37/+322
* [RISCV][GlobalISel] Generate direct branch selectionRichard-Qin-X2026-08-172-13/+10
* [CMake] Accept empty clang-tidy diffsRichard-Qin-X2026-08-171-0/+3
* [RISCV][GlobalISel] Generate implicit-def selectionRichard-Qin-X2026-08-173-8/+20
* [RISCV][GlobalISel] Constrain core copies during selectionRichard-Qin-X2026-08-172-10/+29
* [GlobalISel] Remove redundant virtual copies after selectionRichard-Qin-X2026-08-171-2/+42
* [RISCV][GlobalISel] Generate integer extension selectionsRichard-Qin-X2026-08-1711-262/+516
* [RISCV][GlobalISel] Remove lowered overflow selectionsRichard-Qin-X2026-08-161-367/+0
* [RISCV][GlobalISel] Remove lowered minmax selectionsRichard-Qin-X2026-08-161-117/+0
* [RISCV][GlobalISel] Generate copy sign selectionsRichard-Qin-X2026-08-162-48/+154
* [RISCV][GlobalISel] Generate high multiply selectionsRichard-Qin-X2026-08-162-101/+36
* [RISCV][GlobalISel] Remove obsolete binary selectorRichard-Qin-X2026-08-161-90/+0
* [RISCV][GlobalISel] Generate shift selectionsRichard-Qin-X2026-08-1612-185/+1048
* [RISCV][GlobalISel] Generate integer arithmetic selectionsRichard-Qin-X2026-08-162-111/+264
* [RISCV][GlobalISel] Generate pointer arithmetic selectionsRichard-Qin-X2026-08-162-9/+84
* [RISCV][GlobalISel] Generate floating-point selectionsRichard-Qin-X2026-08-164-183/+518
* [RISCV][GlobalISel] Generate integer comparisonsRichard-Qin-X2026-08-1612-432/+1664
* [RISCV][GlobalISel] Select comparisons against zeroRichard-Qin-X2026-08-168-23/+695
* tablegen: Generate GlobalISel match tablesRichard-Qin-X2026-08-1628-4103/+5272
* cmake: Run clang-tidy incrementally in parallelRichard-Qin-X2026-08-164-15/+132
* [GlobalISel] Propagate no-fp-except flagsRichard-Qin-X2026-08-163-0/+62
* [RISCV][GlobalISel] Select mixed-width copy-signRichard-Qin-X2026-08-162-4/+44
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 15:52:05 +0000