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| * feat: implement saturation-based resolution loop in Prover classRichard Qin2026-04-045-10/+349
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| * feat: implement clause subsumption and tautology detection logic with ↵Richard Qin2026-04-046-0/+250
| | | | | | | | associated unit tests
| * feat: implement variable renaming and update resolution logic to prevent ↵Richard Qin2026-04-043-3/+399
| | | | | | | | variable collisions
| * feat: implement substitution logic and unify/applySubstitution functions for ↵Richard Qin2026-04-036-10/+561
| | | | | | | | term resolution
| * feat: implement core term, symbol, and clause storage logic with ↵Richard Qin2026-04-038-14/+481
| | | | | | | | canonicalization support
| * fix: remove files that should be ignoredRichard Qin2026-04-0317-0/+0
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| * refactor: replace string-based formula representation with interned ↵Richard Qin2026-04-027-24/+416
| | | | | | | | SymbolIds and introduce stateful Clausifier for TPTP parsing
| * Initial commit: Build project architecture, define interfaces, write ↵Richard Qin2026-04-0274-0/+3476
| | | | documentation, with the help of Claude
* [Support] Add MathExtrasRichard Qin12 days3-0/+1148
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* [Support] Add RCCSupport target and naming rulesRichard Qin12 days3-78/+35
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* [ADT] Add function_ref to ADTRichard Qin14 days1-0/+112
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Support] Format codeRichard Qin14 days6-239/+343
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Utils] Use LLVM format and tidy toolsRichard Qin14 days7-322/+2806
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Support] Add ErrorOr supportRichard Qin14 days1-0/+293
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Support] Add errno supportRichard Qin14 days2-0/+140
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Support] Add compiler abstraction supportRichard Qin14 days1-0/+843
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* [CMake] Add RCC platform configuration checksRichard Qin14 days15-0/+3438
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* [CMake] Generate RCC configuration headersRichard Qin14 days3-1/+477
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* [RCC] Add Basic Data TypesRichard Qin2026-10-212-0/+102
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [Dev] Configure build presets and code checksRichard Qin2026-10-205-47/+160
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* [CMake] Establish RCC and CFront builds and package exportsRichard Qin2026-10-2019-78/+585
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* [CMake] Add compiler options and target helpersRichard Qin2026-10-205-0/+1407
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* Rename LICENSE to COPYINGRichard Qin2026-10-181-0/+0
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [MIR] Merge identical scalar type branchesRichard-Qin-X2026-08-291-5/+1
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* [RISCV] Merge identical selector casesRichard-Qin-X2026-08-291-2/+0
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* [RISCV] Widen jump table entry size arithmeticRichard-Qin-X2026-08-291-1/+1
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* [RISCV] Reuse validated Zcmp frame offsetsRichard-Qin-X2026-08-291-8/+12
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* [RISCV] Assert merged memory offset invariantsRichard-Qin-X2026-08-291-0/+2
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* [RISCV] Reuse validated move registersRichard-Qin-X2026-08-291-5/+9
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* [GlobalISel] Bind register bank optionals onceRichard-Qin-X2026-08-291-6/+9
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* [GlobalISel] Assert vector element type invariantsRichard-Qin-X2026-08-291-3/+7
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* [CodeGen] Bind virtual register types onceRichard-Qin-X2026-08-291-2/+3
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* [CodeGen] Apply LLVM declaration styleRichard-Qin-X2026-08-293-3/+3
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* [TableGen] Assert normalized MC pseudo operandsRichard-Qin-X2026-08-291-0/+2
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* [TableGen] Preserve optional target description valuesRichard-Qin-X2026-08-292-9/+10
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* [GlobalISel] Remove redundant PHI narrowing checksRichard-Qin-X2026-08-291-12/+7
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* [CodeGen] Complete LaneMask bitwise operationsRichard-Qin-X2026-08-284-17/+19
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* [Support] Use standard power-of-two checksRichard-Qin-X2026-08-288-39/+20
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* [CMake] Remove unused clang-tidy file registrationRichard-Qin-X2026-08-2838-281/+81
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* [RISCV] Complete Zcmp frame lowering and optimizationRichard-Qin-X2026-08-288-210/+439
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* [RISCV] Generate complete Zcmp instruction definitionsRichard-Qin-X2026-08-286-44/+217
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* [CodeGen] Add target machine registryRichard-Qin-X2026-08-2824-233/+735
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* [CodeGen] Separate assembly emission ownershipRichard-Qin-X2026-08-2815-930/+1033
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* [RISCV] Separate calling convention assignmentRichard-Qin-X2026-08-286-479/+566
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* [CodeGen] Separate pass instrumentation ownershipRichard-Qin-X2026-08-287-612/+648
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* [CodeGen] Remove pass instrumentation snapshotsRichard-Qin-X2026-08-282-104/+11
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* [CodeGen] Centralize machine instruction erasureRichard-Qin-X2026-08-2830-474/+148
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* [GlobalISel] Generate floating memory selectionRichard-Qin-X2026-08-279-159/+179
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* [RISCV] Generate atomic RMW selectionRichard-Qin-X2026-08-273-95/+366
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* [RISCV] Remove unused selector helpersRichard-Qin-X2026-08-271-80/+0
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