| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Add target register descriptions | Richard-Qin-X | 2026-08-01 | 1 | -3/+3 |
| | | | | | Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage. | ||||
| * | [CodeGen] Add target state and compilation status | Richard-Qin-X | 2026-08-01 | 1 | -0/+45 |
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| * | [CodeGen] Add explicit MachineFunction cloning | Richard-Qin-X | 2026-08-01 | 1 | -0/+49 |
| Deep-clone the live MachineIR graph with deterministic identity maps while rebuilding CFG, def-use, ties, register configuration, and memory operand ownership. Verify both source and destination and omit detached arena history. | |||||
