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* [CodeGen] Add target register descriptionsRichard-Qin-X2026-08-011-2/+2
| | | | Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.
* [CodeGen] Add strict MachineIR verificationRichard-Qin-X2026-08-011-0/+36
Verify arena catalogs, intrusive layouts, reciprocal CFG edges, operand ownership, exact def-use coverage, instruction descriptors, pseudo deadlines, and MachineFunctionProperties. Preserve monotonic-arena history while rejecting detached objects that retain live state.