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path: root/backend/include/rcc/Target/RISCV/RISCVTarget.h
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* [RISCV] Add LP64 calling-convention factsRichard-Qin-X2026-08-111-1/+2
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* [MC] Implement RV64GC object emissionRichard-Qin-X2026-08-091-0/+1
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* [RISCV] Complete RV64GC instruction descriptionRichard-Qin-X2026-08-071-2/+53
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* [RISCV] Add generated RV64GC register descriptionRichard-Qin-X2026-08-071-0/+23
Add an RCC-owned build-time target description generator and the initial RV64GC register model. Keep ABI aliases separate from canonical MIR register spelling.