| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Centralize machine pass property validation | Richard-Qin-X | 2026-08-26 | 1 | -4/+0 |
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| * | [CodeGen] Match LLVM machine combiner semantics | Richard-Qin-X | 2026-08-24 | 1 | -210/+140 |
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| * | [CodeGen] Remove unsupported post-frame combiner | Richard-Qin-X | 2026-08-19 | 1 | -18/+0 |
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| * | [CodeGen] Match LLVM post-RA combiner contract | Richard-Qin-X | 2026-08-19 | 1 | -1/+1 |
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| * | [Support] Centralize error context handling | Richard-Qin-X | 2026-08-13 | 1 | -7/+2 |
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| * | [CodeGen] Align pass manager ownership | Richard-Qin-X | 2026-08-13 | 1 | -1/+1 |
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| * | [CodeGen] Split machine liveness components | Richard-Qin-X | 2026-08-13 | 1 | -1/+1 |
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| * | [Tooling] Adopt LLVM MIR command-line spellings | Richard-Qin-X | 2026-08-12 | 1 | -1/+17 |
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| * | [Tooling] Complete backend tooling and validation | Richard-Qin-X | 2026-08-10 | 1 | -5/+17 |
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| * | [MC] Implement RV64GC object emission | Richard-Qin-X | 2026-08-09 | 1 | -1/+3 |
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| * | [CodeGen] Implement machine optimization and scheduling | Richard-Qin-X | 2026-08-09 | 1 | -0/+354 |
