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path: root/backend/lib/CodeGen/MachineMemOperand.cpp
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* [MIR] Parse one-ordering compare-exchange MMOsRichard-Qin-X2026-08-111-3/+4
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* [MIR] Accept fixed-baseline LLVM syntaxRichard-Qin-X2026-08-111-3/+37
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* [MIR] Add machine instruction parser and printerRichard-Qin-X2026-08-041-1/+54
| | | | Parse MachineFunction bodies in two passes and serialize the same MachineIR model in complete or readable form. Extend instruction attachments and memory operands required by the fixed LLVM MIR grammar, and cover deterministic parse-print round trips.
* [CodeGen] Add MIR function and block attributesRichard-Qin-X2026-08-011-8/+0
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* [CodeGen] Add machine IR value semanticsRichard-Qin-X2026-08-011-0/+244
Add strongly typed machine indices, lane masks, instruction flags, fixed-point branch probabilities, and preserved-register masks. Model immutable machine memory operands with explicit base identity, size, alignment, address space, alias information, and validated atomic operation and ordering rules. Cover normal, boundary, and invalid combinations in standalone tests.