| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Implement the greedy register allocator pipeline | Richard-Qin-X | 2026-08-25 | 1 | -6/+13 |
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| * | [CodeGen] Match LLVM PBQP allocator input contract | Richard-Qin-X | 2026-08-19 | 1 | -4/+2 |
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| * | [Support] Centralize error context handling | Richard-Qin-X | 2026-08-13 | 1 | -1/+1 |
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| * | [CodeGen] Align pass manager ownership | Richard-Qin-X | 2026-08-13 | 1 | -4/+4 |
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| * | [CodeGen] Split machine liveness components | Richard-Qin-X | 2026-08-13 | 1 | -1/+2 |
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| * | [Tooling] Complete backend tooling and validation | Richard-Qin-X | 2026-08-10 | 1 | -11/+62 |
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| * | [CodeGen] Implement RV64GC frame lowering | Richard-Qin-X | 2026-08-09 | 1 | -1/+11 |
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| * | [CodeGen] Complete register allocation infrastructure | Richard-Qin-X | 2026-08-09 | 1 | -0/+281 |
