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* [CodeGen] Add machine IR value semanticsRichard-Qin-X2026-08-014-0/+306
| | | | | | Add strongly typed machine indices, lane masks, instruction flags, fixed-point branch probabilities, and preserved-register masks. Model immutable machine memory operands with explicit base identity, size, alignment, address space, alias information, and validated atomic operation and ordering rules. Cover normal, boundary, and invalid combinations in standalone tests.
* [CodeGen] Add core machine type primitivesRichard-Qin-X2026-08-014-0/+448
Introduce an independent 64-bit extended LLT representation that preserves exact floating-point semantics and supports fixed and scalable vectors. Add opaque physical and virtual registers, strongly typed monotonic stable IDs, and atomic MachineFunctionProperties transitions. Export the primitives through RCCBackend::CodeGen, cover their boundary and failure cases, record the frozen invariants, and normalize the architecture document permissions.