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path: root/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
Commit message (Collapse)AuthorAgeFilesLines
* [RISCV][GlobalISel] Generate direct branch selectionRichard-Qin-X2026-08-171-13/+0
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* [RISCV][GlobalISel] Generate implicit-def selectionRichard-Qin-X2026-08-171-3/+0
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* [RISCV][GlobalISel] Constrain core copies during selectionRichard-Qin-X2026-08-171-0/+15
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* [RISCV][GlobalISel] Generate integer extension selectionsRichard-Qin-X2026-08-171-126/+11
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* [RISCV][GlobalISel] Remove lowered overflow selectionsRichard-Qin-X2026-08-161-367/+0
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* [RISCV][GlobalISel] Remove lowered minmax selectionsRichard-Qin-X2026-08-161-117/+0
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* [RISCV][GlobalISel] Generate copy sign selectionsRichard-Qin-X2026-08-161-48/+28
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* [RISCV][GlobalISel] Generate high multiply selectionsRichard-Qin-X2026-08-161-101/+0
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* [RISCV][GlobalISel] Remove obsolete binary selectorRichard-Qin-X2026-08-161-90/+0
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* [RISCV][GlobalISel] Generate shift selectionsRichard-Qin-X2026-08-161-107/+135
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* [RISCV][GlobalISel] Generate integer arithmetic selectionsRichard-Qin-X2026-08-161-111/+4
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* [RISCV][GlobalISel] Generate pointer arithmetic selectionsRichard-Qin-X2026-08-161-9/+0
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* [RISCV][GlobalISel] Generate floating-point selectionsRichard-Qin-X2026-08-161-182/+3
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* [RISCV][GlobalISel] Generate integer comparisonsRichard-Qin-X2026-08-161-174/+2
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* tablegen: Generate GlobalISel match tablesRichard-Qin-X2026-08-161-47/+22
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* [GlobalISel] Propagate no-fp-except flagsRichard-Qin-X2026-08-161-0/+15
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* [RISCV][GlobalISel] Select mixed-width copy-signRichard-Qin-X2026-08-161-2/+42
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* [RISCV][GlobalISel] Select word division pseudosRichard-Qin-X2026-08-161-1/+10
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* [RISCV][GlobalISel] Select RV64 word shiftsRichard-Qin-X2026-08-161-0/+69
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* [RISCV][GlobalISel] Select constant operands as immediatesRichard-Qin-X2026-08-161-23/+114
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* [RISCV][GlobalISel] Select word shift pseudosRichard-Qin-X2026-08-151-2/+8
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* [RISCV][GlobalISel] Match LLVM constant materializationRichard-Qin-X2026-08-151-127/+88
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* [RISCV][GlobalISel] Constrain selected builder operandsRichard-Qin-X2026-08-151-1/+73
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* [CodeGen] Match LLVM Legalizer ownershipRichard-Qin-X2026-08-141-2/+2
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* [CodeGen] Unify scalar low-level typesRichard-Qin-X2026-08-131-121/+140
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* [RISCV] Match LLVM register bank mappingsRichard-Qin-X2026-08-131-1/+1
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* [RISCV] Use the generated opcode conversionRichard-Qin-X2026-08-131-73/+69
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* [Support] Split APInt and APFloat ownershipRichard-Qin-X2026-08-131-1/+1
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* [RISCV] Split the GlobalISel target componentsRichard-Qin-X2026-08-121-0/+2627
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 22:01:02 +0000