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path: root/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp
Commit message (Collapse)AuthorAgeFilesLines
* [CodeGen] Centralize machine instruction erasureRichard-Qin-X2026-08-281-11/+4
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* [RISCV] Implement push-pop optimizationRichard-Qin-X2026-08-261-13/+13
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* [RISCV] Implement save and restore libcallsRichard-Qin-X2026-08-241-11/+33
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* [RISCV] Generate MC pseudo loweringRichard-Qin-X2026-08-221-178/+9
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* [RISCV][GlobalISel] Select and expand global addressesRichard-Qin-X2026-08-191-0/+123
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* [RISCV][GlobalISel] Generate indirect branch selectionRichard-Qin-X2026-08-191-0/+47
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* [CodeGen] Unify scalar low-level typesRichard-Qin-X2026-08-131-2/+3
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* [RISCV] Remove physical register forwarding helpersRichard-Qin-X2026-08-131-14/+7
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* [RISCV] Use the generated opcode conversionRichard-Qin-X2026-08-131-16/+12
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* [RISCV] Split the GlobalISel target componentsRichard-Qin-X2026-08-121-1/+1
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* [RISCV] Model FFLAGS accessesRichard-Qin-X2026-08-121-0/+51
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* [CodeGen] Remove redundant numeric call-site IDsRichard-Qin-X2026-08-111-7/+3
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* [RISCV] Legalize fixed-baseline RV64 MachineIRRichard-Qin-X2026-08-111-0/+40
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* [CodeGen] Implement machine optimization and schedulingRichard-Qin-X2026-08-091-0/+512
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 22:49:59 +0000