rcc-project - An optimizing compiler for C.

	Commit message (Collapse)	Author	Age	Files	Lines
*	[RISCV] Model typed floating-point register views	Richard-Qin-X	2026-08-11	1	-0/+37
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*	[RISCV] Add LP64 calling-convention facts	Richard-Qin-X	2026-08-11	1	-3/+9
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*	[RISCV] Legalize fixed-baseline RV64 MachineIR	Richard-Qin-X	2026-08-11	1	-0/+4
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*	[RISCV] Complete RV64GC instruction description	Richard-Qin-X	2026-08-07	1	-0/+61
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*	[RISCV] Add generated RV64GC register description	Richard-Qin-X	2026-08-07	1	-0/+103
	Add an RCC-owned build-time target description generator and the initial RV64GC register model. Keep ABI aliases separate from canonical MIR register spelling.