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An optimizing compiler for C.
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Author
Age
Files
Lines
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*
[RISCV] Match LLVM frame lowering semantics
Richard-Qin-X
2026-08-24
11
-151
/
+140
|
*
[CodeGen] Implement RISC-V peephole branch optimization
Richard-Qin-X
2026-08-24
4
-1
/
+324
|
*
[RISCV] Generate MC pseudo lowering
Richard-Qin-X
2026-08-22
6
-195
/
+145
|
*
[CodeGen] Match LLVM machine debug stripping
Richard-Qin-X
2026-08-22
5
-1
/
+62
|
*
[CodeGen] Generate RISC-V macro fusion rules
Richard-Qin-X
2026-08-22
19
-78
/
+830
|
*
[CodeGen] Match LLVM final verifier contract
Richard-Qin-X
2026-08-19
1
-2
/
+2
|
*
[CodeGen] Match LLVM finalization contract
Richard-Qin-X
2026-08-19
1
-2
/
+2
|
*
[CodeGen] Match LLVM late pseudo contract
Richard-Qin-X
2026-08-19
1
-2
/
+2
|
*
[CodeGen] Remove RCC fallthrough normalization
Richard-Qin-X
2026-08-19
3
-169
/
+0
|
*
[CodeGen] Match LLVM block placement contract
Richard-Qin-X
2026-08-19
1
-6
/
+2
|
*
[CodeGen] Unify LLVM branch folding pipeline
Richard-Qin-X
2026-08-19
4
-424
/
+304
|
*
[CodeGen] Match LLVM tail duplication contract
Richard-Qin-X
2026-08-19
1
-9
/
+1
|
*
[CodeGen] Match LLVM post-machine scheduler contract
Richard-Qin-X
2026-08-19
1
-7
/
+1
|
*
[CodeGen] Match LLVM post-RA pseudo expansion contract
Richard-Qin-X
2026-08-19
1
-7
/
+1
|
*
[CodeGen] Remove non-LLVM machine DCE placements
Richard-Qin-X
2026-08-19
1
-6
/
+0
|
*
[CodeGen] Remove unsupported post-frame combiner
Richard-Qin-X
2026-08-19
3
-24
/
+1
|
*
[CodeGen] Remove unsupported pre-PEI pseudo expansion
Richard-Qin-X
2026-08-19
2
-39
/
+2
|
*
[CodeGen] Match LLVM shrink wrapping contract
Richard-Qin-X
2026-08-19
1
-7
/
+1
|
*
[CodeGen] Match LLVM post-RA sink contract
Richard-Qin-X
2026-08-19
1
-3
/
+1
|
*
[CodeGen] Match LLVM post-RA LICM contract
Richard-Qin-X
2026-08-19
1
-3
/
+1
|
*
[CodeGen] Match LLVM post-RA combiner contract
Richard-Qin-X
2026-08-19
1
-1
/
+1
|
*
[CodeGen] Match LLVM stack slot coloring contract
Richard-Qin-X
2026-08-19
1
-6
/
+1
|
*
[CodeGen] Match LLVM PBQP allocator input contract
Richard-Qin-X
2026-08-19
1
-4
/
+2
|
*
[CodeGen] Match LLVM machine scheduler contract
Richard-Qin-X
2026-08-19
1
-6
/
+1
|
*
[CodeGen] Match LLVM machine sink input contract
Richard-Qin-X
2026-08-19
1
-2
/
+2
|
*
[CodeGen] Match LLVM prologepilog input contract
Richard-Qin-X
2026-08-19
1
-2
/
+1
|
*
[GlobalISel] Generate prelegalizer combiner rules
Richard-Qin-X
2026-08-19
9
-10
/
+760
|
*
[RISCV][GlobalISel] Select and expand global addresses
Richard-Qin-X
2026-08-19
18
-14
/
+438
|
*
[RISCV][GlobalISel] Generate integer store selection
Richard-Qin-X
2026-08-19
2
-80
/
+76
|
*
[RISCV][GlobalISel] Generate integer load selection
Richard-Qin-X
2026-08-19
4
-75
/
+310
|
*
[RISCV][GlobalISel] Generate frame index selection
Richard-Qin-X
2026-08-19
2
-0
/
+17
|
*
[RISCV][GlobalISel] Correct floating constant materialization
Richard-Qin-X
2026-08-19
1
-3
/
+16
|
*
[RISCV][GlobalISel] Match floating comparisons
Richard-Qin-X
2026-08-19
5
-155
/
+395
|
*
[RISCV][GlobalISel] Generate trap selection
Richard-Qin-X
2026-08-19
3
-16
/
+28
|
*
[RISCV][GlobalISel] Generate select instruction matching
Richard-Qin-X
2026-08-19
5
-161
/
+229
|
*
[RISCV][GlobalISel] Generate indirect branch selection
Richard-Qin-X
2026-08-19
9
-22
/
+114
|
*
[RISCV][GlobalISel] Generate conditional branch selection
Richard-Qin-X
2026-08-17
6
-35
/
+296
|
*
[RISCV][GlobalISel] Generate direct branch selection
Richard-Qin-X
2026-08-17
2
-13
/
+10
|
*
[RISCV][GlobalISel] Generate implicit-def selection
Richard-Qin-X
2026-08-17
2
-3
/
+10
|
*
[RISCV][GlobalISel] Constrain core copies during selection
Richard-Qin-X
2026-08-17
2
-10
/
+29
|
*
[GlobalISel] Remove redundant virtual copies after selection
Richard-Qin-X
2026-08-17
1
-2
/
+42
|
*
[RISCV][GlobalISel] Generate integer extension selections
Richard-Qin-X
2026-08-17
5
-187
/
+380
|
*
[RISCV][GlobalISel] Remove lowered overflow selections
Richard-Qin-X
2026-08-16
1
-367
/
+0
|
*
[RISCV][GlobalISel] Remove lowered minmax selections
Richard-Qin-X
2026-08-16
1
-117
/
+0
|
*
[RISCV][GlobalISel] Generate copy sign selections
Richard-Qin-X
2026-08-16
2
-48
/
+154
|
*
[RISCV][GlobalISel] Generate high multiply selections
Richard-Qin-X
2026-08-16
2
-101
/
+36
|
*
[RISCV][GlobalISel] Remove obsolete binary selector
Richard-Qin-X
2026-08-16
1
-90
/
+0
|
*
[RISCV][GlobalISel] Generate shift selections
Richard-Qin-X
2026-08-16
6
-168
/
+821
|
*
[RISCV][GlobalISel] Generate integer arithmetic selections
Richard-Qin-X
2026-08-16
2
-111
/
+264
|
*
[RISCV][GlobalISel] Generate pointer arithmetic selections
Richard-Qin-X
2026-08-16
2
-9
/
+84
|
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