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* [mubios] Configure PIIX PCI interrupt routing during POSTHEADmasterRichard Qin12 hours1-0/+1
| | | | | | | | | | | | PCI devices retained interrupt line zero, causing e1000 to request the timer IRQ and fail to bring up the network interface. Enumerate the root PCI bus, configure PIIX3 PIRQ A-D to IRQ10/10/11/11, and assign device interrupt lines using the QEMU pc slot and pin mapping. Keep the PIIX PM SCI on IRQ9 and configure level triggering in the ELCR while preserving other IRQ settings. Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Fix legacy interrupt routing and enable PIIX IDE channelsRichard Qin12 hours1-0/+1
| | | | | | | | | | | | Keep IOAPIC inputs masked and deliver legacy PIC interrupts through LVT0 only, avoiding extra ExtINT routes that leave PIC and APIC interrupts in service. Enumerate the root PCI bus for the PIIX3 IDE controller during POST. Enable I/O decoding and both IDE channels while preserving their timing configuration so Linux ata_piix probes the disks. Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Initialize the 8042 keyboard controllerRichard Qin16 hours1-0/+1
| | | | | | | | | | | | | | | POST only unmasked IRQ1 in the PIC and never configured the 8042 itself, so the keyboard stayed in its post-reset disabled state: the clock was inhibited and no scan code ever reached the output buffer. IRQ1 never fired, the BDA keyboard buffer stayed empty, and GRUB polling INT 16h AH=01h never saw a key. Add kbd_init() to disable both ports, drain the output buffer, clear the clock inhibit bits in the command byte, enable the keyboard and auxiliary IRQs and select set 1 translation, then enable scanning with 0xF4. The IRQ1 handler now checks the status register for a pending output byte before reading the data port and drops auxiliary port bytes. The set 2 break prefix tracking is gone because translation is enabled.
* [mubios] Initialize VGA mode and serial BIOS servicesRichard Qin36 hours1-0/+1
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* [mubios] Multi-sector INT 13h AH=42hRichard Qin2 days1-1/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Add ATARichard Qin2 days1-1/+10
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Enable IRQ0Richard Qin2 days1-1/+2
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Create 16-bit entry points for IRQ0/IRQ1 and install the IVT vectors.Richard Qin2 days1-1/+3
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement the PIC and PIT.Richard Qin2 days1-1/+4
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement the COM1 serial port driver and POST output.Richard Qin2 days1-0/+5
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Initialize IVT, BDA and EBDA.Richard Qin3 days1-1/+4
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Building a 32-bit C entry in protected modeRichard Qin3 days1-0/+26
Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
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