| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mubios] Configure PIIX PCI interrupt routing during POSTHEADmaster | Richard Qin | 22 hours | 1 | -0/+114 |
| PCI devices retained interrupt line zero, causing e1000 to request the timer IRQ and fail to bring up the network interface. Enumerate the root PCI bus, configure PIIX3 PIRQ A-D to IRQ10/10/11/11, and assign device interrupt lines using the QEMU pc slot and pin mapping. Keep the PIIX PM SCI on IRQ9 and configure level triggering in the ELCR while preserving other IRQ settings. Signed-off-by: Richard Qin <richard.qin.x@gmail.com> | |||||
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