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* [mubios] Fix legacy interrupt routing and enable PIIX IDE channelsRichard Qin28 hours1-0/+1
| | | | | | | | | | | | Keep IOAPIC inputs masked and deliver legacy PIC interrupts through LVT0 only, avoiding extra ExtINT routes that leave PIC and APIC interrupts in service. Enumerate the root PCI bus for the PIIX3 IDE controller during POST. Enable I/O decoding and both IDE channels while preserving their timing configuration so Linux ata_piix probes the disks. Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement serial input and BIOS console key handlingRichard Qin30 hours1-0/+6
| | | | | | Implement UART receive, transmit timeouts, configuration and status reporting for INT 14h functions 00h-03h. Initialize the BDA serial timeout and expose the driver interfaces. Translate terminal characters and CSI/SS3 escape sequences into BIOS keyboard events for INT 16h. Add blocking reads, non-consuming status queries, enhanced key reads and keyboard buffer insertion.
* [mubios] Derive the E820 map from the CMOS memory sizeRichard Qin31 hours1-0/+2
| | | | | | | | | | The E820 map ended the usable region at a hardcoded 0x08000000, so a guest with more RAM had the extra memory reported as reserved and ran out of memory during initramfs unpacking. Add cmos_read8() and size the extended memory entry from CMOS registers 0x34 and 0x35, falling back to the 16 MiB units in 0x30 and 0x31 and then to the previous 128 MiB end when neither is programmed.
* [mubios] Initialize the 8042 keyboard controllerRichard Qin31 hours1-0/+1
| | | | | | | | | | | | | | | POST only unmasked IRQ1 in the PIC and never configured the 8042 itself, so the keyboard stayed in its post-reset disabled state: the clock was inhibited and no scan code ever reached the output buffer. IRQ1 never fired, the BDA keyboard buffer stayed empty, and GRUB polling INT 16h AH=01h never saw a key. Add kbd_init() to disable both ports, drain the output buffer, clear the clock inhibit bits in the command byte, enable the keyboard and auxiliary IRQs and select set 1 translation, then enable scanning with 0xF4. The IRQ1 handler now checks the status register for a pending output byte before reading the data port and drops auxiliary port bytes. The set 2 break prefix tracking is gone because translation is enabled.
* [mubios] Initialize VGA mode and serial BIOS servicesRichard Qin2 days1-0/+2
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* [mubios] Add CHS disk services and multi-sector PIO readsRichard Qin2 days1-0/+1
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* [mubios] Add EDD parameters and normalize PS/2 inputRichard Qin2 days1-0/+2
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* [mubios] Implement INT 16h Keyboard ServiceRichard Qin3 days1-0/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement INT 15h E820hRichard Qin3 days1-0/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Multi-sector INT 13h AH=42hRichard Qin3 days1-1/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Add Interrupt Dispatch ServiceRichard Qin3 days1-0/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Add C implementation of INT 10hRichard Qin3 days1-0/+5
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Add ATARichard Qin3 days1-0/+2
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Enable IRQ0Richard Qin3 days1-0/+1
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Create 16-bit entry points for IRQ0/IRQ1 and install the IVT vectors.Richard Qin3 days1-0/+2
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement the PIC and PIT.Richard Qin3 days1-0/+3
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Implement the COM1 serial port driver and POST output.Richard Qin3 days1-0/+4
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Initialize IVT, BDA and EBDA.Richard Qin3 days1-1/+17
| | | | Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
* [mubios] Building a 32-bit C entry in protected modeRichard Qin3 days1-0/+27
Signed-off-by: Richard Qin <richard.qin.x@gmail.com>
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