From 1fe32a79cee5cae6dea6fbb1d9f15f7db817a356 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sat, 15 Aug 2026 23:33:09 +0800 Subject: [GlobalISel] Clear virtual register types after selection --- backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 3 +++ backend/lib/CodeGen/MachineVerifier.cpp | 5 +++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp index 15dfdf0..642e26f 100644 --- a/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp +++ b/backend/lib/CodeGen/GlobalISel/InstructionSelect.cpp @@ -326,6 +326,9 @@ Expected InstructionSelect::runImplementation(MachineFunction if (!RegisterValidation) return std::unexpected(withErrorContext(RegisterValidation.error(), "instruction selection produced invalid registers: ")); + Function.registerInfo().clearAllVirtualRegisterTypes(); + Result.Changed = true; + Result.Changes.add(MachinePassChange::Registers); Result.Preserved = Result.Changed ? PreservedAnalyses::none() : PreservedAnalyses::all(); return Result; } diff --git a/backend/lib/CodeGen/MachineVerifier.cpp b/backend/lib/CodeGen/MachineVerifier.cpp index 68a28db..5a040b9 100644 --- a/backend/lib/CodeGen/MachineVerifier.cpp +++ b/backend/lib/CodeGen/MachineVerifier.cpp @@ -923,8 +923,9 @@ private: } const bool NeedsTypes = Options.Mode == MachineVerifierMode::PreLegalizer || - Has(MachineFunctionProperty::Legalized) || - Has(MachineFunctionProperty::RegBankSelected); + (!Has(MachineFunctionProperty::Selected) && + (Has(MachineFunctionProperty::Legalized) || + Has(MachineFunctionProperty::RegBankSelected))); if (NeedsTypes && MissingVirtualType) return fail("typed pipeline stage has a virtual register without LowLevelType"); -- cgit v1.2.3