From 97e5fbaa55b4672db36123c2425d05a4738452ab Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Fri, 14 Aug 2026 20:35:54 +0800
Subject: [GlobalISel] Match LLVM legalization value tracking

---
 .../rcc/CodeGen/GlobalISel/LegalizerHelper.h       | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)

(limited to 'backend/include/rcc/CodeGen/GlobalISel/LegalizerHelper.h')

diff --git a/backend/include/rcc/CodeGen/GlobalISel/LegalizerHelper.h b/backend/include/rcc/CodeGen/GlobalISel/LegalizerHelper.h
index 9a34898..19b3345 100644
--- a/backend/include/rcc/CodeGen/GlobalISel/LegalizerHelper.h
+++ b/backend/include/rcc/CodeGen/GlobalISel/LegalizerHelper.h
@@ -8,6 +8,8 @@
 #include "rcc/CodeGen/MachineIRBuilder.h"
 #include "rcc/Support/Error.h"
 
+#include <vector>
+
 namespace rcc {
 
 class MachineFunction;
@@ -36,7 +38,36 @@ public:
                                               std::size_t OperandIndex = 0,
                                               GenericOpcode TruncOpcode = GenericOpcode::G_TRUNC);
 
+  [[nodiscard]] Expected<void> narrowScalar(MachineInstr &Instruction, std::size_t TypeIndex,
+                                            LowLevelType NarrowType);
+
 private:
+  [[nodiscard]] Expected<void> widenScalarMergeValues(MachineInstr &Instruction,
+                                                      std::size_t TypeIndex, LowLevelType WideType);
+  [[nodiscard]] Expected<void>
+  widenScalarUnmergeValues(MachineInstr &Instruction, std::size_t TypeIndex, LowLevelType WideType);
+  [[nodiscard]] Expected<void> insertParts(Register Destination, LowLevelType ResultType,
+                                           LowLevelType PartType,
+                                           const std::vector<Register> &PartRegisters,
+                                           LowLevelType LeftoverType = {},
+                                           const std::vector<Register> &LeftoverRegisters = {});
+  [[nodiscard]] Expected<void> extractGCDType(std::vector<Register> &Parts, LowLevelType GCDType,
+                                              Register Source);
+  [[nodiscard]] Expected<LowLevelType> extractGCDType(std::vector<Register> &Parts,
+                                                      LowLevelType DestinationType,
+                                                      LowLevelType NarrowType, Register Source);
+  [[nodiscard]] Expected<LowLevelType>
+  buildLCMMergePieces(LowLevelType DestinationType, LowLevelType NarrowType, LowLevelType GCDType,
+                      std::vector<Register> &Registers,
+                      GenericOpcode PadStrategy = GenericOpcode::G_ANYEXT);
+  [[nodiscard]] Expected<void>
+  buildWidenedRemergeToDst(Register Destination, LowLevelType LCMType,
+                           const std::vector<Register> &RemergeRegisters);
+  [[nodiscard]] Expected<void> narrowScalarAddSub(MachineInstr &Instruction, std::size_t TypeIndex,
+                                                  LowLevelType NarrowType);
+  [[nodiscard]] Expected<void> narrowScalarExt(MachineInstr &Instruction, std::size_t TypeIndex,
+                                               LowLevelType NarrowType);
+
   MachineFunction &Function;
   MachineRegisterInfo &MRI;
   const LegalizerInfo &Info;
-- 
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