From f8daf08aba1f09c3024a70d3426891112d1662a2 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Wed, 12 Aug 2026 21:35:21 +0800 Subject: [RISCV] Consolidate instruction behavior in RISCVInstrInfo --- backend/include/rcc/CodeGen/MachineCopyPropagation.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'backend/include/rcc/CodeGen/MachineCopyPropagation.h') diff --git a/backend/include/rcc/CodeGen/MachineCopyPropagation.h b/backend/include/rcc/CodeGen/MachineCopyPropagation.h index e8ee788..43baa7e 100644 --- a/backend/include/rcc/CodeGen/MachineCopyPropagation.h +++ b/backend/include/rcc/CodeGen/MachineCopyPropagation.h @@ -10,7 +10,7 @@ namespace rcc { -class TargetSSAInfo; +class TargetInstrInfo; enum class MachineCopyPropagationStage : std::uint8_t { PreRegisterAllocation, @@ -23,7 +23,7 @@ struct MachineCopyPropagationOptions final { class MachineCopyPropagationPass final : public MachineFunctionPass { public: - MachineCopyPropagationPass(const TargetSSAInfo &Info, MachineCopyPropagationStage Stage, + MachineCopyPropagationPass(const TargetInstrInfo &Info, MachineCopyPropagationStage Stage, MachineCopyPropagationOptions Options = {}) noexcept : Info(&Info), Stage(Stage), Options(Options) {} @@ -37,7 +37,7 @@ private: const TargetDescription &Target, MachineActionReplay &Actions) const; - const TargetSSAInfo *Info; + const TargetInstrInfo *Info; MachineCopyPropagationStage Stage; MachineCopyPropagationOptions Options; }; -- cgit v1.2.3