From 432efe39315ed5ad0162f9c08dbf10941bc21dc1 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Mon, 3 Aug 2026 19:24:30 +0800
Subject: [CodeGen] Add target MIR text schema

---
 backend/include/rcc/CodeGen/MachineRegisterInfo.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'backend/include/rcc/CodeGen/MachineRegisterInfo.h')

diff --git a/backend/include/rcc/CodeGen/MachineRegisterInfo.h b/backend/include/rcc/CodeGen/MachineRegisterInfo.h
index da0f530..b6485e3 100644
--- a/backend/include/rcc/CodeGen/MachineRegisterInfo.h
+++ b/backend/include/rcc/CodeGen/MachineRegisterInfo.h
@@ -83,6 +83,7 @@ struct VirtualRegisterInfo final {
   std::optional<RegisterBankID> Bank;
   std::optional<RegisterClassID> RegClass;
   std::vector<PhysicalRegister> AllocationHints;
+  std::uint8_t TargetFlags = 0;
   bool IsTombstone = false;
 };
 
@@ -123,6 +124,8 @@ public:
   [[nodiscard]] Expected<void> setRegisterClass(Register Reg, RegisterClassID RegClass);
   [[nodiscard]] Expected<void> clearRegisterClass(Register Reg);
   [[nodiscard]] Expected<void> addAllocationHint(Register Reg, PhysicalRegister Hint);
+  [[nodiscard]] Expected<void> setTargetRegisterFlags(Register Reg, std::uint8_t Flags);
+  [[nodiscard]] Expected<void> clearTargetRegisterFlags(Register Reg);
   void clearAllVirtualRegisterTypes() noexcept;
 
   [[nodiscard]] Expected<void>
-- 
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