From 6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Tue, 11 Aug 2026 17:37:42 +0800 Subject: [MIR] Accept fixed-baseline LLVM syntax --- backend/include/rcc/CodeGen/TargetCodeGen.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'backend/include/rcc/CodeGen/TargetCodeGen.h') diff --git a/backend/include/rcc/CodeGen/TargetCodeGen.h b/backend/include/rcc/CodeGen/TargetCodeGen.h index f2aac5d..34a6de4 100644 --- a/backend/include/rcc/CodeGen/TargetCodeGen.h +++ b/backend/include/rcc/CodeGen/TargetCodeGen.h @@ -89,6 +89,11 @@ public: const TargetDescription &) const { return {}; } + + [[nodiscard]] virtual Expected + constrainSelectedInstruction(MachineInstr &, MachineFunction &, const TargetDescription &) const { + return {}; + } }; class TargetSSAInfo { -- cgit v1.2.3