From f8daf08aba1f09c3024a70d3426891112d1662a2 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Wed, 12 Aug 2026 21:35:21 +0800
Subject: [RISCV] Consolidate instruction behavior in RISCVInstrInfo

---
 backend/include/rcc/CodeGen/TargetCodeGen.h | 38 -----------------------------
 1 file changed, 38 deletions(-)

(limited to 'backend/include/rcc/CodeGen/TargetCodeGen.h')

diff --git a/backend/include/rcc/CodeGen/TargetCodeGen.h b/backend/include/rcc/CodeGen/TargetCodeGen.h
index 34a6de4..65f65a4 100644
--- a/backend/include/rcc/CodeGen/TargetCodeGen.h
+++ b/backend/include/rcc/CodeGen/TargetCodeGen.h
@@ -3,20 +3,14 @@
 #ifndef RCC_CODEGEN_TARGETCODEGEN_H
 #define RCC_CODEGEN_TARGETCODEGEN_H
 
-#include "rcc/CodeGen/MachineIRTypes.h"
-#include "rcc/CodeGen/Register.h"
 #include "rcc/Support/Error.h"
 
-#include <cstddef>
 #include <cstdint>
-#include <optional>
 
 namespace rcc {
 
 class MachineFunction;
-class MachineBasicBlock;
 class MachineInstr;
-class MachineRegisterInfo;
 class TargetDescription;
 struct VirtualRegisterInfo;
 
@@ -96,38 +90,6 @@ public:
   }
 };
 
-class TargetSSAInfo {
-public:
-  virtual ~TargetSSAInfo() = default;
-
-  [[nodiscard]] virtual Expected<bool> isFallthroughEdge(const MachineBasicBlock &From,
-                                                         const MachineBasicBlock &To,
-                                                         const MachineFunction &Function,
-                                                         const TargetDescription &Target) const = 0;
-
-  [[nodiscard]] virtual Expected<bool>
-  rewriteBranchTarget(MachineBasicBlock &Block, MachineBasicBlock &OldTarget,
-                      MachineBasicBlock &NewTarget, MachineFunction &Function,
-                      const TargetDescription &Target) const = 0;
-
-  [[nodiscard]] virtual Expected<void>
-  insertUnconditionalBranch(MachineBasicBlock &Block, MachineBasicBlock &Target,
-                            MachineFunction &Function,
-                            const TargetDescription &TargetDescription) const = 0;
-
-  [[nodiscard]] virtual Expected<void> validateCopy(Register Destination,
-                                                    SubRegIndex DestinationSubReg, Register Source,
-                                                    SubRegIndex SourceSubReg,
-                                                    const MachineFunction &Function,
-                                                    const TargetDescription &Target) const = 0;
-
-  [[nodiscard]] virtual Expected<bool> tryConvertToThreeAddress(MachineInstr &, std::size_t,
-                                                                std::size_t, MachineFunction &,
-                                                                const TargetDescription &) const {
-    return false;
-  }
-};
-
 } // namespace rcc
 
 #endif // RCC_CODEGEN_TARGETCODEGEN_H
-- 
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