From 379ff50dcc7ccf977379aee68fa9d10f69065d23 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sun, 9 Aug 2026 18:31:49 +0800 Subject: [MC] Implement RV64GC assembly emission --- .../rcc/Target/RISCV/RISCVAssemblyPrinter.h | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h (limited to 'backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h') diff --git a/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h b/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h new file mode 100644 index 0000000..5c8dca5 --- /dev/null +++ b/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H +#define RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H + +#include "rcc/CodeGen/AsmPrinter.h" +#include "rcc/CodeGen/TargetDescription.h" +#include "rcc/Support/Error.h" + +#include + +namespace rcc { +class CompilationUnit; +class MachineFunction; +} // namespace rcc + +namespace rcc::riscv { + +struct AssemblyEmissionOptions final { + bool EmitFunctionDirectives = true; + bool EmitCFI = true; + bool EmitBlockLabels = true; + bool VerifyInput = true; +}; + +[[nodiscard]] Expected emitAssembly(const CompilationUnit &Unit, + const TargetDescription &Target, + AssemblyEmissionOptions Options = {}); +[[nodiscard]] Expected emitAssembly(const MachineFunction &Function, + const TargetDescription &Target, + AssemblyEmissionOptions Options = {}); + +} // namespace rcc::riscv + +#endif // RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H -- cgit v1.2.3