From 379ff50dcc7ccf977379aee68fa9d10f69065d23 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Sun, 9 Aug 2026 18:31:49 +0800
Subject: [MC] Implement RV64GC assembly emission

---
 .../include/rcc/Target/RISCV/RISCVInstPrinter.h    | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 backend/include/rcc/Target/RISCV/RISCVInstPrinter.h

(limited to 'backend/include/rcc/Target/RISCV/RISCVInstPrinter.h')

diff --git a/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h b/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h
new file mode 100644
index 0000000..564ca2f
--- /dev/null
+++ b/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#ifndef RCC_TARGET_RISCV_RISCVINSTPRINTER_H
+#define RCC_TARGET_RISCV_RISCVINSTPRINTER_H
+
+#include "rcc/CodeGen/TargetDescription.h"
+#include "rcc/MC/MCInstPrinter.h"
+
+#include <cstdint>
+#include <string>
+#include <string_view>
+
+namespace rcc::riscv {
+
+enum class RISCVMCExprKind : std::uint32_t {
+  CallPLT = 1,
+  PCRelativeHigh = 2,
+  PCRelativeLow = 3,
+};
+
+class RISCVInstPrinter final : public mc::MCInstPrinter {
+public:
+  explicit RISCVInstPrinter(const TargetDescription &Target) noexcept : Target(&Target) {}
+
+  [[nodiscard]] Expected<std::string>
+  printInstruction(const mc::MCInst &Instruction) const override;
+  [[nodiscard]] Expected<std::string>
+  printTargetExpression(std::uint32_t Kind, std::string_view Operand) const override;
+
+private:
+  const TargetDescription *Target;
+};
+
+} // namespace rcc::riscv
+
+#endif // RCC_TARGET_RISCV_RISCVINSTPRINTER_H
-- 
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