From 3a57627e59ba18b6f9f9aae7bb60c390c0d3575a Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sun, 9 Aug 2026 22:05:14 +0800 Subject: [MC] Implement RV64GC object emission --- backend/include/rcc/Target/RISCV/RISCVTarget.h | 1 + 1 file changed, 1 insertion(+) (limited to 'backend/include/rcc/Target/RISCV/RISCVTarget.h') diff --git a/backend/include/rcc/Target/RISCV/RISCVTarget.h b/backend/include/rcc/Target/RISCV/RISCVTarget.h index ca0849d..e005fb8 100644 --- a/backend/include/rcc/Target/RISCV/RISCVTarget.h +++ b/backend/include/rcc/Target/RISCV/RISCVTarget.h @@ -37,6 +37,7 @@ struct AssemblyInstructionInfo final { Opcode InstructionOpcode; std::string_view Mnemonic; AssemblyFormatID Format; + std::uint32_t Encoding = 0; }; struct CallingConventionInfo final { -- cgit v1.2.3