From 3a57627e59ba18b6f9f9aae7bb60c390c0d3575a Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sun, 9 Aug 2026 22:05:14 +0800 Subject: [MC] Implement RV64GC object emission --- .../rcc/Target/RISCV/RISCVTargetRelocationKinds.h | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 backend/include/rcc/Target/RISCV/RISCVTargetRelocationKinds.h (limited to 'backend/include/rcc/Target/RISCV/RISCVTargetRelocationKinds.h') diff --git a/backend/include/rcc/Target/RISCV/RISCVTargetRelocationKinds.h b/backend/include/rcc/Target/RISCV/RISCVTargetRelocationKinds.h new file mode 100644 index 0000000..08bc73f --- /dev/null +++ b/backend/include/rcc/Target/RISCV/RISCVTargetRelocationKinds.h @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef RCC_TARGET_RISCV_RISCVTARGETRELOCATIONKINDS_H +#define RCC_TARGET_RISCV_RISCVTARGETRELOCATIONKINDS_H + +#include "rcc/CodeGen/MachineIRTypes.h" + +#include + +namespace rcc::riscv { + +enum class RISCVTargetRelocationKind : std::uint32_t { + Absolute32 = 1, + Absolute64, +}; + +[[nodiscard]] constexpr TargetRelocationKindID +targetRelocationKind(RISCVTargetRelocationKind Kind) noexcept { + return TargetRelocationKindID::fromValue(static_cast(Kind)); +} + +} // namespace rcc::riscv + +#endif // RCC_TARGET_RISCV_RISCVTARGETRELOCATIONKINDS_H -- cgit v1.2.3