From 379ff50dcc7ccf977379aee68fa9d10f69065d23 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sun, 9 Aug 2026 18:31:49 +0800 Subject: [MC] Implement RV64GC assembly emission --- .../rcc/Target/RISCV/RISCVAssemblyPrinter.h | 35 ++++++++++++ .../include/rcc/Target/RISCV/RISCVInstPrinter.h | 36 +++++++++++++ .../rcc/Target/RISCV/RISCVMCTargetLowering.h | 62 ++++++++++++++++++++++ 3 files changed, 133 insertions(+) create mode 100644 backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h create mode 100644 backend/include/rcc/Target/RISCV/RISCVInstPrinter.h create mode 100644 backend/include/rcc/Target/RISCV/RISCVMCTargetLowering.h (limited to 'backend/include/rcc/Target') diff --git a/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h b/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h new file mode 100644 index 0000000..5c8dca5 --- /dev/null +++ b/backend/include/rcc/Target/RISCV/RISCVAssemblyPrinter.h @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H +#define RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H + +#include "rcc/CodeGen/AsmPrinter.h" +#include "rcc/CodeGen/TargetDescription.h" +#include "rcc/Support/Error.h" + +#include + +namespace rcc { +class CompilationUnit; +class MachineFunction; +} // namespace rcc + +namespace rcc::riscv { + +struct AssemblyEmissionOptions final { + bool EmitFunctionDirectives = true; + bool EmitCFI = true; + bool EmitBlockLabels = true; + bool VerifyInput = true; +}; + +[[nodiscard]] Expected emitAssembly(const CompilationUnit &Unit, + const TargetDescription &Target, + AssemblyEmissionOptions Options = {}); +[[nodiscard]] Expected emitAssembly(const MachineFunction &Function, + const TargetDescription &Target, + AssemblyEmissionOptions Options = {}); + +} // namespace rcc::riscv + +#endif // RCC_TARGET_RISCV_RISCVASSEMBLYPRINTER_H diff --git a/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h b/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h new file mode 100644 index 0000000..564ca2f --- /dev/null +++ b/backend/include/rcc/Target/RISCV/RISCVInstPrinter.h @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef RCC_TARGET_RISCV_RISCVINSTPRINTER_H +#define RCC_TARGET_RISCV_RISCVINSTPRINTER_H + +#include "rcc/CodeGen/TargetDescription.h" +#include "rcc/MC/MCInstPrinter.h" + +#include +#include +#include + +namespace rcc::riscv { + +enum class RISCVMCExprKind : std::uint32_t { + CallPLT = 1, + PCRelativeHigh = 2, + PCRelativeLow = 3, +}; + +class RISCVInstPrinter final : public mc::MCInstPrinter { +public: + explicit RISCVInstPrinter(const TargetDescription &Target) noexcept : Target(&Target) {} + + [[nodiscard]] Expected + printInstruction(const mc::MCInst &Instruction) const override; + [[nodiscard]] Expected + printTargetExpression(std::uint32_t Kind, std::string_view Operand) const override; + +private: + const TargetDescription *Target; +}; + +} // namespace rcc::riscv + +#endif // RCC_TARGET_RISCV_RISCVINSTPRINTER_H diff --git a/backend/include/rcc/Target/RISCV/RISCVMCTargetLowering.h b/backend/include/rcc/Target/RISCV/RISCVMCTargetLowering.h new file mode 100644 index 0000000..fd620ad --- /dev/null +++ b/backend/include/rcc/Target/RISCV/RISCVMCTargetLowering.h @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef RCC_TARGET_RISCV_RISCVMCTARGETLOWERING_H +#define RCC_TARGET_RISCV_RISCVMCTARGETLOWERING_H + +#include "rcc/CodeGen/TargetMCInstLowering.h" +#include "rcc/Target/RISCV/RISCVInstPrinter.h" + +namespace rcc::riscv { + +class RISCVMCTargetLowering final : public TargetMCInstLowering { +public: + explicit RISCVMCTargetLowering(const TargetDescription &Target) noexcept + : Target(&Target), Printer(Target) {} + + [[nodiscard]] const mc::MCInstPrinter &instructionPrinter() const noexcept override { + return Printer; + } + + [[nodiscard]] Expected lowerInstruction(const MachineInstr &Instruction, + MachineMCContext &Context) const override; + [[nodiscard]] Expected emitTerminalInstruction(const MachineInstr &Instruction, + MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + + [[nodiscard]] Expected + textSection(const MachineFunction &Function) const override; + [[nodiscard]] Expected globalSection(const GlobalObjectDesc &Object, + MachineMCContext &Context) const override; + [[nodiscard]] Expected + constantPoolSection(const MachineFunction &Function, + const MachineConstantPoolEntry &Entry) const override; + [[nodiscard]] Expected + jumpTableSection(const MachineFunction &Function, + const MachineJumpTableEntry &Entry) const override; + + [[nodiscard]] Expected emitFileHeader(MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + [[nodiscard]] Expected emitFileTrailer(MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + [[nodiscard]] Expected emitGenericConstant(const GenericConstantData &Constant, + std::uint64_t Size, MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + [[nodiscard]] Expected emitGlobalInitializer(const GlobalInitializer &Initializer, + MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + [[nodiscard]] Expected emitTargetConstant(const TargetConstant &Constant, + MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + [[nodiscard]] Expected emitTargetJumpTable(const MachineFunction &Function, + const MachineJumpTableEntry &Entry, + MachineMCContext &Context, + mc::MCStreamer &Streamer) const override; + +private: + const TargetDescription *Target; + RISCVInstPrinter Printer; +}; + +} // namespace rcc::riscv + +#endif // RCC_TARGET_RISCV_RISCVMCTARGETLOWERING_H -- cgit v1.2.3