From 3e15bfd7b075209ec3b65d30d0611e060f6fbb77 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Fri, 7 Aug 2026 22:03:11 +0800 Subject: [RISCV] Complete RV64GC instruction description --- backend/include/rcc/Target/RISCV/RISCVTarget.h | 55 +++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 2 deletions(-) (limited to 'backend/include/rcc/Target') diff --git a/backend/include/rcc/Target/RISCV/RISCVTarget.h b/backend/include/rcc/Target/RISCV/RISCVTarget.h index 948e22d..ca0849d 100644 --- a/backend/include/rcc/Target/RISCV/RISCVTarget.h +++ b/backend/include/rcc/Target/RISCV/RISCVTarget.h @@ -3,20 +3,71 @@ #ifndef RCC_TARGET_RISCV_RISCVTARGET_H #define RCC_TARGET_RISCV_RISCVTARGET_H -#include "rcc/CodeGen/TargetMIRTextInfo.h" -#include "rcc/CodeGen/TargetRegisterInfo.h" +#include "rcc/CodeGen/TargetDescription.h" #include "rcc/Support/Error.h" +#include "rcc/Target/RISCV/RISCVInstructions.h" #include "rcc/Target/RISCV/RISCVRegisters.h" #include #include +#include +#include namespace rcc::riscv { +struct SchedulingClassInfo final { + SchedulingClassID ID; + std::string_view Name; + std::uint32_t MicroOps = 0; + std::uint32_t Latency = 0; +}; + +struct EncodingCategoryInfo final { + EncodingCategoryID ID; + std::string_view Name; + std::uint32_t SizeInBytes = 0; +}; + +struct AssemblyFormatInfo final { + AssemblyFormatID ID; + std::string_view Name; +}; + +struct AssemblyInstructionInfo final { + Opcode InstructionOpcode; + std::string_view Mnemonic; + AssemblyFormatID Format; +}; + +struct CallingConventionInfo final { + CallingConvention ID; + std::string_view Name; + RegisterClassID IntegerRegisterClass; + RegisterClassID FloatingRegisterClass; + std::span IntegerArgumentRegisters; + std::span FloatingArgumentRegisters; + std::span IntegerReturnRegisters; + std::span FloatingReturnRegisters; + std::string_view PreservedMaskName; + std::uint32_t StackAlignmentBytes = 0; + std::uint32_t StackArgumentAlignmentBytes = 0; + std::uint32_t ShadowSpaceBytes = 0; + bool SupportsVarArgs = false; + bool SupportsTailCalls = false; +}; + [[nodiscard]] Expected physicalRegister(PhysicalRegisterID ID); [[nodiscard]] Expected createRegisterInfo(); [[nodiscard]] Expected createMIRTextInfo(); +[[nodiscard]] Expected createTargetDescription(); [[nodiscard]] std::shared_ptr createCallPreservedMask(); +[[nodiscard]] std::span schedulingClasses() noexcept; +[[nodiscard]] std::span encodingCategories() noexcept; +[[nodiscard]] std::span assemblyFormats() noexcept; +[[nodiscard]] std::span assemblyInstructions() noexcept; +[[nodiscard]] const AssemblyInstructionInfo *assemblyInstruction(Opcode InstructionOpcode) noexcept; +[[nodiscard]] std::span callingConventions() noexcept; +[[nodiscard]] const CallingConventionInfo *callingConvention(CallingConvention ID) noexcept; } // namespace rcc::riscv -- cgit v1.2.3